Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-09-26
2004-03-09
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S158000, C365S185330, C710S005000
Reexamination Certificate
active
06704835
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention pertains generally to computer systems. In particular, it pertains to flash memory operations in computer systems.
2. Description of the Related Art
Flash memory is a specialized type of memory that permits data to be written and read one byte at a time, but it can only be erased in entire blocks. Typical block size in flash devices ranges from 8 kilobytes (KB) to 128 KB. The data stored in flash memory locations cannot be changed without erasing the locations first. Since only entire blocks can be erased, the new data must be written into unused locations of a previously erased block, and any pointers that identify the location of the data must be changed accordingly. If a large section of data must remain intact (such as an indexable table of values), the entire section must be copied to another block, even if only one byte was changed. The erase function is time-consuming, and can take as much as one full second to accomplish.
Flash memory has fairly good performance for read operations, but for the aforementioned reasons has relatively poor performance for write and erase operations. Flash memory managers have been developed to isolate application programs from flash memory management.
FIG. 1
shows a conventional flash memory system
10
. A conventional flash memory manager
11
involves the use of a foreground manager
12
, a background manager
14
, and a data queue
13
. Data queue
13
provides temporary buffer storage for write and erase commands from application program
15
before they are actually executed to the flash memory
16
. This permits the application programs to be decoupled from the erratic latency periods that are imposed by the characteristics of flash memory. The data queue can also help to resolve concurrency problems. If application program
15
tries to read a location after a write command to that location has been placed in data queue
13
, but before the data in flash memory
16
has actually been changed, the most recent version of the data can be read from the data queue.
Foreground manager
12
interfaces with the application program, initiates read and write functions, and places the write commands into data queue
13
. Read commands can be sent directly to flash memory
16
by the foreground manager. Background manager
14
takes the write commands from queue
13
, generally on a first-in first-out basis, and initiates the actual memory operation to flash memory
16
. Foreground manager
12
also detects if there is available space in flash to perform a write operation, through the space-available function
17
. If not, it can inform the application program of this fact and abort the write or take some other remedial action. If space is available, the write command can be placed in the queue and the application program informed that the write has taken place. However, the background manager decides just how to write data and associated data structures into flash memory
16
, and these decisions can affect how much space is actually available when the write operation is removed from the data queue and processed by the background manager. Foreground manager
12
therefore predicts whether the command will be successful (whether space will be available when the command reaches flash), and places the command in queue
13
if success is predicted. If background manager
14
encounters a “flash full” condition” when it tries to execute the command because flash memory
16
has insufficient space in which to write the data, a fatal error code is generated and normal processing may be shut down. To prevent this, foreground manager
12
must make worst-case predictions, leading to inefficient flash memory operations.
When determining if sufficient space is available before attempting a write operation to flash memory
16
, background manager
14
basically re-executes the space-available function, thereby resulting in duplication of effort by flash memory manager
11
. If flash memory manager
11
is executed in software or firmware, as it typically is, the foreground and background space-available functions are executed at different times, doubling the amount of time devoted to the space monitoring process and negatively impacting the throughput performance of flash memory management.
REFERENCES:
patent: 5559988 (1996-09-01), Durante et al.
patent: 5619452 (1997-04-01), Miyauchi
patent: 5715424 (1998-02-01), Jesionowski et al.
patent: 5799168 (1998-08-01), Ban
patent: 5999446 (1999-12-01), Harari et al.
patent: 6026465 (2000-02-01), Mills et al.
patent: 6301635 (2001-10-01), Bothwell et al.
patent: 0 392 895 (1990-03-01), None
patent: 0557736 (1993-09-01), None
patent: 0833251 (1998-04-01), None
patent: WO 97/13204 (1997-04-01), None
Andrew S. Tanenbaum, Structured Computer Organization, 1984, Chapter one, pp. 10-11.
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