Cleaning and liquid contact with solids – Processes – Including application of electrical radiant or wave energy...
Reexamination Certificate
2000-06-29
2002-09-24
Goudreau, George (Department: 1763)
Cleaning and liquid contact with solids
Processes
Including application of electrical radiant or wave energy...
C438S725000, C438S734000, C438S750000, C438S704000, C438S717000, C134S001300, C216S057000
Reexamination Certificate
active
06453915
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application Ser. No. 89111824, filed Jun. 16, 2000.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method of manufacturing integrated circuits. More particularly, the present invention relates to a method of cleaning polycide gates after etching.
2. Description of Related Art
FIG. 1A
is a cross-sectional view of a conventional polycide gate on a substrate
100
. To form the polycide gate on the substrate
100
, a gate oxide layer
102
, a polysilicon layer
104
, a titanium nitride layer
106
, a silicide layer
108
and a oxy-nitride layer (SiON)
110
are sequentially formed over a substrate
100
. Photolithographic and etching processes are next conducted to form a gate
112
having a residual photoresist layer
114
thereon.
In fact, the gate
112
that includes the polysilicon layer
104
, the titanium nitride layer
106
and the silicide layer
108
are known collectively as a polycide gate. The titanium nitride layer
106
functions as a barrier layer. The oxy-nitride layer
110
is an anti-reflection layer. Because line width of the gate
112
needs to be very accurate, an anisotropic dry etching such as reactive ion etching must be used. During the etching step, a layer of high molecular weight film
116
is normally formed on the sidewalls of the gate structure
112
.
After the formation of the titanium polycide gate, a conventional dry etching operation such as plasma ashing is carried out. A conventional wet cleaning is next carried out using a solvent cleaner. However, a residual high molecular weight film
116
still clings to the sidewalls of the gate structure.
Gaseous reactants within the reactive plasma for dry cleaning are sometimes changed in an attempt to reduce the amount of high molecular weight film
116
clinging to the sidewalls of the gate. The dry plasma cleaning is generally carried out at a high temperature (e.g. 250° C.). It is found, however, that plasma without any fluoride content can hardly remove high molecular weight residues. Although plasma with fluoride and oxygen is capable of improving cleaning performance, the plasma also erodes the gate oxide layer
102
and the sidewalls of the titanium nitride layer (that is, the barrier layer
106
).
FIG. 1B
is a cross-sectional view of a conventional polycide gate on a substrate after a dry cleaning operation using plasma that contains fluoride and oxygen. Undercutting of the titanium nitride layers
106
,
110
and the gate oxide layer
102
is clearly shown in FIG.
1
B.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a method of cleaning polycide gates after an etching step so that residual high molecular weight film on the gate sidewalls is removed.
A second object of this invention is to provide a method of cleaning polycide gates capable of maintaining integrity of the sidewalls of a titanium nitride layer and a gate oxide layer.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of cleaning polycide gates after an etching step. A gate oxide layer, a polysilicon layer, a titanium nitride layer, a silicide layer, an anti-reflection layer and a patterned photoresist layer are sequentially formed over a substrate. An etching operation is next carried out to form a gate structure. The gate structure is formed out of the patterned polysilicon layer, the titanium nitride layer and the silicide layer. The gate structure is subsequently cleaned in a three-step cleaning operation. In the first cleaning step, minute amount of fluoride-containing compound, hydrogen and inert gas are used as gaseous reactants in a low-temperature plasma-cleaning operation. The fluoride-containing compound is capable of initiating a free radical chain reaction. In the second cleaning step, a solvent containing ammonium ions is applied to the gate structure. In the third cleaning step, a solution formed by dissolving oxidizing agent in de-ionized water is applied.
In the first cleaning step, reaction temperature of the plasma is about 80 to 150° C. and the reaction chamber is at a pressure of about 0.6 to 0.9 torr. The inert gas can be nitrogen, for example. The fluoride-containing compound can be, for example, carbon tetrafluoride and trifluoromethane. In addition, ratio between the fluoride-containing compound and the inert gas is preferably between 0.01 to 0.03 while the ratio between the hydrogen and the inert gas is preferably about 0.04. In the second cleaning step, the ammonium compound solvent can be commercial product ACT 935 or ACT 970, for example. in the third cleaning step, the amount of oxidizing agent within the de-ionized water is preferably between 40 to 60 ppm. The oxidizing agent can be ozone, for example.
Since a small amount of fluoride-containing compound capable of triggering free radical chain reaction is used at a low temperature, photoresist material is removed efficiently. On the other hand, because only minute amount of fluoride-containing compound is used at a low temperature, erosion of the titanium nitride layer is prevented. In addition, any residual photoresist and organic high molecular substrate are removed by the subsequently applied ammonium compound solvent and the oxidizing solution. Hence, the gate structure is thoroughly cleaned without causing any conventional problems.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5780406 (1998-07-01), Honda et al.
patent: 6030932 (2000-02-01), Leon et al.
patent: 6245155 (2001-06-01), Leon et al.
Wu Chih-Ning
Yang Chan-Lon
Goudreau George
J.C. Patents
United Microelectronics Corp.
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