Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2008-07-22
2008-07-22
Schillinger, Laura M (Department: 2813)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S275000, C438S710000
Reexamination Certificate
active
11292883
ABSTRACT:
The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region, wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer, and subjecting the exposed nitridated, high voltage dielectric to a high vacuum to remove the accelerant residue.
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Alshareef Husam N.
Bevan Malcolm J.
Gurba April
Khamankar Rajesh
Kirkpatrick Brian K.
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