Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Patent
1995-06-07
1996-10-01
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
257637, H01L 2358
Patent
active
055613187
ABSTRACT:
This invention provides a process for making a semiconductor device with reduced capacitance between adjacent conductors. This process can include applying and gelling one or more solutions between and over conductors 24 and drying the wet gel to create at least porous dielectric sublayers 28 and 29. By varying the composition of the solutions, gelling conditions, drying temperature, composition of the solvents in the wet gel, or a combination of these approaches, the porosity of the sublayers may be tailored individually. A non-porous dielectric layer 30 may be formed over porous layer 28, which may complete an interlayer dielectric. A novel process for creating the porous dielectric layer is disclosed, which can be completed at vacuum or ambient pressures, yet results in porosity, pore size, and shrinkage of the dielectric during drying comparable to that previously attainable only by drying gels at supercritical pressure.
REFERENCES:
patent: 4652467 (1987-03-01), Brinker et al.
patent: 4987101 (1991-01-01), Kaanta et al.
patent: 5103288 (1992-04-01), Sakamoto et al.
patent: 5155576 (1992-10-01), Mizushima
patent: 5393712 (1995-02-01), Rostoker et al.
Cho Chih-Chen
Gnade Bruce E.
Smith Douglas M.
Crane Sara W.
Donaldson Richard L.
Harris James E.
Stoltz Richard A.
Tang Alice W.
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