Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1997-04-23
2000-08-01
Fourson, George
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438406, H01L 2176
Patent
active
060966211
ABSTRACT:
A method for dissipating accumulated charge in a trench isolation structure, comprising the steps of: etching the trench region into a silicon substrate; forming an insulating region on the sidewalls of the trench and the base of the trench; removing the insulator at the bottom of the trench; and filling the trench with polysilicon, the polysilicon engaging the second layer of silicon below the insulator layer.
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patent: 5445988 (1995-08-01), Schwalke
patent: 5569621 (1996-10-01), Yallup et al.
Elantec, Inc.
Fourson George
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