Polycrystalline silicon oxidation method for making shallow and

Details Polycrystalline silicon oxidation method for making shallow and Polycrystalline silicon oxidation method for making shallow and

1979-06-14

1980-12-09

Massie, Jerome W.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156643, 156648, 156649, 156662, 427 93, 427 95, 427399, H01L 21308

Patent

active

042382785

ABSTRACT:
A method for making both shallow and deep recessed oxide isolation trenches in silicon semiconductor substrates. A semiconductor substrate is reactively ion etched through mask apertures defining the deep trench areas and at least the perimeters of the shallow trench areas, the etched trenches are oxidized and partially filled with chemical-vapor-deposited (CVD) oxide. The filling of the trenches is completed with polycrystalline silicon. The excess polycrystalline silicon covering substrate areas other than the deep trench areas is removed down to the underlying CVD oxide.
The shallow trench areas are etched next, some of the shallow trench areas connecting with the upper regions of the deep trench areas. The monocrystalline and polycrystalline silicon in the respective shallow trench areas are removed and the remaining silicon is thermally oxidized.

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patent: 3969168 (1976-07-01), Kuhn
patent: 4044452 (1977-08-01), Abbas et al.
patent: 4104086 (1978-08-01), Bondur et al.
patent: 4104090 (1978-08-01), Pogge
patent: 4139442 (1979-02-01), Bondur et al.
patent: 4160991 (1979-07-01), Anantha et al.
Jones et al., "A Composite . . . Isolation", Electrochemical Technology, vol. 5, No. 5-6, (6/67), pp. 308-310.
Anantha et al., "Method of Making 1/N Cell", IBM Technical Disclosure Bulletin, vol. 21, No. 2 (7/78), pp. 601-602.
Abbas, "Recessed Oxide . . . Process", IBM Technical Disclosure Bulletin, vol. 20, No. 1, (6/77), pp. 144-145.

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