Poly crystalline silicon semiconductor device and method of...

Details Poly crystalline silicon semiconductor device and method of... Poly crystalline silicon semiconductor device and method of...

2004-12-28

2008-08-19

Lee, Hsien-ming (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Amorphous semiconductor material

C257S066000, C257S072000, C438S149000, C438S151000, C349S042000, C349S043000

Reexamination Certificate

active

07414264

ABSTRACT:
Provided are a poly crystalline silicon semiconductor device and a method of fabricating the same. Portions of a silicon layer except for gates are removed to reduce a parasitic capacitance caused from the silicon layer existing on gate bus lines. The silicon layer exists under the gates only, thus the parasitic capacitance is reduced and the deterioration and the delay of signals are prevented. Accordingly, the poly crystalline silicon semiconductor device, such as a thin film transistor, has excellent electric characteristics.

REFERENCES:
patent: 5817550 (1998-10-01), Carey et al.
patent: 2002/0057248 (2002-05-01), Matsushima
patent: 2004/0061176 (2004-04-01), Takafuji et al.
patent: 1998-0011681 (1998-04-01), None
patent: 2001-0053695 (2001-07-01), None
Korean Office Action dated Mar. 10, 2006.

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