Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2007-06-05
2007-06-05
Peyton, Tammara (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S036000, C710S052000, C710S053000, C710S105000, C710S110000, C710S241000, C710S309000, C370S362000
Reexamination Certificate
active
10864200
ABSTRACT:
A polling-based communication apparatus and system. The apparatus of the invention, connected to a host computer through a peripheral bus, comprises an arbiter and multiple addressable entities. Each addressable entity corresponds to one of queues maintained in the host computer. The arbiter can determine which queue is to be served next in accordance with a quality of serve policy. The host computer polls each addressable entity by issuing a query packet. Depending on the queue chosen to be served next, the arbiter grants the corresponding addressable entity access to the peripheral bus, causing this granted addressable entity to respond to the host computer's polling with an acknowledgement packet. Thus the host computer initiates transactions to transfer data packets from the chosen queue through the peripheral bus to the corresponding addressable entity.
REFERENCES:
patent: 6662306 (2003-12-01), Van Loo
patent: 2005/0157709 (2005-07-01), Lin
Lin Chu-Ming
Yin Shih-Chung
Mediatek Inc.
Peyton Tammara
Thomas Kayden Horstemeyer & Risley
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