Abrading – Abrading process – Utilizing fluent abradant
Reexamination Certificate
2003-06-19
2004-11-16
Eley, Timothy V. (Department: 3724)
Abrading
Abrading process
Utilizing fluent abradant
C451S041000, C451S059000, C451S063000
Reexamination Certificate
active
06817926
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to increasing the associated volume of polishing composition relative to contact area in chemical mechanical planarization processes.
Three-dimensional fixed abrasive polishing pads have been used in chemical mechanical planarization processes to planarize and polish dielectrics, metal lines and interconnects present on the surface of a wafer suited for fabrication of semiconductor devices. The three-dimensional structures on these polishing pads extend from a substrate surface in the form of circular posts, square posts, hexagonal posts, pyramids and truncated pyramids.
During many chemical mechanical planarization processes, a polishing composition is brought in contact with a semiconductor wafer surface. The polishing composition chemically modifies the wafer surface rendering the surface more amendable to removal. Fixed abrasive polishing pads and many particle slurry pad combinations used in chemical mechanical planarization processes work to remove the modified layer of the wafer and spent polishing composition, which enables the surface-modification/removal process to be repeated until the desired final properties of the wafer surface are obtained.
SUMMARY
In one aspect, the invention features a method of chemically modifying a wafer suited for fabrication of semiconductor devices that includes a) contacting a surface of the wafer with an article that includes a plurality of unit cells repeating across the surface of the article, the individual unit cells including at least a portion of a three-dimensional structure and being characterized by a unit cell parameter as follows:
[[
V
1
−Vs]/Aas]/Auc>
5
where V
1
is the volume defined by the area of the unit cell and the height of the structure of the unit cell, Vs is the volume of the structure of the unit cell, Aas is the apparent contact area of the structure of the unit cell, and Auc is the area of the unit cell, and b) moving at least one of the wafer and the article relative to each other in the presence of a polishing composition capable of chemically reacting with the surface of the wafer and being capable of either enhancing or inhibiting the rate of removal of at least a portion of the surface of the wafer.
In one embodiment, the portion of the wafer includes a chemically distinct phase of the wafer. In another embodiment, the unit cell includes a plurality of three-dimensional structures. In other embodiments [[V
1
−Vs]/Aas]/Auc ≧10. In some embodiments [[V
1
−Vs]/Aas]/Auc≧15. In one embodiment [[V
1
−Vs]/Aas]/Auc≧20.
In another embodiment, at least one dimension that defines the apparent contact area of the structure is from 1 &mgr;m to no greater than 500 &mgr;m. In other embodiments, at least one dimension that defines the apparent contact area of the structure is from 1 &mgr;m to no greater than 200 &mgr;m. In another embodiment, the apparent contact area of an individual structure is from 1 &mgr;m
2
to 200,000 &mgr;m
2
.
In one embodiment, the height of the structure is from 10 &mgr;m to 500 &mgr;m. In some embodiments, 15 &mgr;m≧Auc≧2000 &mgr;m.
In other embodiments the unit cell includes one three-dimensional structure. In another embodiment, the unit cell includes a number of three-dimensional structures. In some embodiments, the unit cell includes a portion of a number of three-dimensional structures.
In some embodiments, the article is a fixed abrasive article for modifying the surface of a wafer suited for fabrication of semiconductor devices and further includes a plurality of fixed abrasive structures located in a predetermined arrangement in a region of the article, the region being of a dimension sufficient to planarize the surface of a wafer suited for fabrication of semiconductor devices.
In another embodiment, the region includes at least about 10 structures/linear cm, at least about 50 structures/linear cm, or at least about 500 structures/linear cm.
In some embodiments, the three-dimensional structures are uniformly distributed in the region. In other embodiments, the three-dimensional structures are arranged in a pattern having a repeating period. In one embodiment, at least some of the three-dimensional structures are located in clusters.
In one embodiment, the three-dimensional structures further include a binder and abrasive particles disposed in the binder. In other embodiments, the three-dimensional structures are essentially free of inorganic abrasive particles. In an embodiment, the three-dimensional structures are essentially free of components reactive with a wafer.
In some embodiments, the three-dimensional structures are of a form selected from the group consisting of cubic posts, cylindrical posts, rectangular posts, prismatic, pyramidal, truncated pyramidal, conical, truncated conical, cross, hemispherical and combinations thereof. In one embodiment, the three-dimensional structures include a pyramidal form having sides of varying slope relative to the base of the pyramid. In another embodiment, substantially all of the three-dimensional structures have the same shape and dimensions.
In some embodiments, the three-dimensional structures are located on a polishing element and the article further includes a) a resilient element and b) a rigid element disposed between the polishing element and the resilient element. In another embodiment, the rigid element is bonded to the polishing element and the resilient element.
In one embodiment, the method includes planarizing the surface of the wafer suited for fabrication of semiconductor devices. In another embodiment, the method includes planarizing a metal surface (e.g., copper) of a wafer suited for fabrication of semiconductor devices. In other embodiments, the method includes planarizing a dielectric surface of a wafer suited for fabrication of semiconductor devices. In some embodiments, the method is substantially free of audible vibration.
In some embodiments, the method is conducted in the absence of inorganic abrasive particles. In other embodiments, the polishing composition includes abrasive particles. In another embodiment, the polishing composition is essentially free of abrasive particles.
In one embodiment, the method further includes removing at least about 500 Angstroms of material/minute from the surface of at least one wafer for a period of at least about 200 minutes. In other embodiments, the method further includes removing at least about 500 Angstroms of material/minute from the surface of at least one wafer and providing wafers having no greater than about 10% wafer non-uniformity.
In another embodiment, the structures include elongated prismatic structures. In another embodiment, the structures include elongated ridges.
In another aspect, the invention features a method of chemically modifying a wafer suited for fabrication of semiconductor devices and the method includes a) contacting the surface of the wafer with an article that includes a number of unit cells repeating across the surface of the article, the individual unit cells including at least a portion of a three-dimensional structure and being characterized by a unit cell parameter [[V
1
−Vs]/Aas]/Auc>1, where V
1
is the volume defined by the area of the unit cell and the height of the structure of the unit cell, Vs is the volume of the structure of the unit cell, Aas is the apparent contact area of the structure of the unit cell, and Auc is the area of the unit cell, the three-dimensional structure being essentially free of inorganic abrasive particles, and b) moving at least one of the wafer and the article relative to each other in the presence of a polishing composition that is chemically reactive with the surface of the wafer and capable of either enhancing or inhibiting the rate of removal of at least a portion of the surface of the wafer.
In other aspects, the invention features an article for modifying the surface of a wafer suited for fabrication
Kollodge Jeffrey S.
Messner Robert P.
3M Innovative Properties Company
Eley Timothy V.
LandOfFree
Polishing pad and method of use thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Polishing pad and method of use thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Polishing pad and method of use thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3357209