Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-07-21
1999-06-22
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438 8, 438 14, 438756, 216 38, 216 89, 216 84, H01L 2100
Patent
active
059142758
ABSTRACT:
To planarize an insulating film formed on a semiconductor substrate, a polishing slurry containing cerium oxide is used to polish the surface of the insulating film. Using the cerium oxide included slurry as a polishing agent, the insulating film is not contaminated by alkali metals during the polishing process. Furthermore, the insulating film is polished at an enhanced polishing rate.
REFERENCES:
patent: 3715842 (1973-02-01), Tredinnick et al.
patent: 4545153 (1985-10-01), Miller et al.
patent: 4671851 (1987-06-01), Beyer et al.
patent: 4711587 (1987-12-01), Cocito
patent: 4735679 (1988-04-01), Laske
patent: 4879258 (1989-11-01), Fisher
patent: 4910155 (1990-03-01), Cote et al.
patent: 4940507 (1990-07-01), Harbarger
patent: 4956313 (1990-09-01), Cote et al.
patent: 4962616 (1990-10-01), Wittstock
patent: 5036015 (1991-07-01), Sadhu et al.
patent: 5054244 (1991-10-01), Takamatsu et al.
patent: 5064683 (1991-11-01), Poon et al.
patent: 5069002 (1991-12-01), Sandhu et al.
patent: 5078801 (1992-01-01), Malik
patent: 5084071 (1992-01-01), Neuadic et al.
patent: 5096854 (1992-03-01), Saito et al.
patent: 5104828 (1992-04-01), Morimoto et al.
patent: 5110428 (1992-05-01), Prigge et al.
patent: 5196353 (1993-03-01), Sandhu et al.
patent: 5213655 (1993-05-01), Leach et al.
patent: 5236861 (1993-08-01), Otsu
patent: 5246884 (1993-09-01), Jaso et al.
patent: 5262346 (1993-11-01), Bindal et al.
patent: 5272117 (1993-12-01), Roth et al.
patent: 5308438 (1994-05-01), Cote et al.
patent: 5320706 (1994-06-01), Blackwell
patent: 5421769 (1995-06-01), Schultz et al.
patent: 5445996 (1995-08-01), Kodera et al.
patent: 5499733 (1996-03-01), Litvak
Aoki Riichirou
Kodera Masako
Okano Haruo
Shigeta Atsushi
Yajima Hiromi
Kabushiki Kaisha Toshiba
Powell William
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