Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2011-02-08
2011-02-08
Geyer, Scott B (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S666000, C257SE21579, C257SE21577
Reexamination Certificate
active
07884019
ABSTRACT:
A method of forming a dual-damascene structure is disclosed. A lower dielectric hardmask layer and an upper dielectric hardmask layer are deposited on an ultra low-k film. A first via is formed in the upper hardmask layer. Next, a first trench is formed using the tri-layer resist scheme. Finally, a full via and a full trench are formed simultaneously. An optional etch-stop layer can be used in the ultra low-k layer to control trench depth.
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Choi Yong Seok
Dostalik William W.
Jiang Ping
Brady III Wade J.
Franz Warren L.
Geyer Scott B
Sene Pape
Telecky , Jr. Frederick J.
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