Electrical computers and digital processing systems: memory – Address formation – Incrementing – decrementing – or shifting circuitry
Reexamination Certificate
2007-02-20
2007-02-20
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Incrementing, decrementing, or shifting circuitry
Reexamination Certificate
active
10245795
ABSTRACT:
A pointer circuit for pointing to elements in at least one collection of elements comprises a base pointer for providing a first binary-coded value defining a first address of an element in the collection. The pointer circuit also comprises a binary shift circuit receiving the first binary-coded value provided by the base pointer and a second binary-coded value defining a shift value. The binary shift circuit combines the first and second binary-coded values to provide a third binary-coded value defining a second address of an element in the collection differing from the first address by the shift value. A shift-value generator fed by the first binary-coded value generates the second binary-coded value depending on the first binary-coded value, so that a generated shift value takes into account shift values corresponding to first binary-coded values preceding a current first binary-coded value in a prescribed first binary-coded value progression order.
REFERENCES:
patent: 4319322 (1982-03-01), Allain et al.
patent: 5111389 (1992-05-01), McAuliffe et al.
patent: 5133061 (1992-07-01), Melton et al.
patent: 5555397 (1996-09-01), Sasama et al.
patent: 5935258 (1999-08-01), Klein
patent: 6021512 (2000-02-01), Lattimore et al.
patent: 6151662 (2000-11-01), Christie et al.
patent: 0 361 143 (1990-04-01), None
A hardware mechanism for dynamic extraction and relayout of program hot spots Merten, M.C.; Trick, A.R.; Nystrom, E.M.; Barnes, R.D.; Hwu, W.-M.W.; Computer Architecture, 2000. Proceedings of the 27th International Symposium on, Jun. 10-14, 2000 pp. 59-70.
Low-Power Instruction Bus Encoding for Embedded Processors Petrov, P.; Orailoglu, A.; Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 12, Issue: 8, Aug. 2004; pp. 812-826.
EP Search Report 01830591, Feb. 13, 2002.
Graybeal Jackson Haley LLP
Han J. Mark
Jorgenson Lisa K.
Peugh Brian R.
STMicroelectronics S.R.L.
LandOfFree
Pointer circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Pointer circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pointer circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3864181