PMOSFETS having indium or gallium doped buried channels and n+po

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257369, H01L 2976, H01L 2994

Patent

active

057675570

ABSTRACT:
Sub-micron PMOSFETs including n.sup.+ polysilicon gates and buried channels having impurity concentrations comprising indium or gallium are provided. The buried channel PMOSFETs have improved short channel characteristics and are particularly suitable for use in CMOS technologies.

REFERENCES:
patent: 4574467 (1986-03-01), Halfacre et al.
patent: 4679303 (1987-07-01), Chen et al.
patent: 4845047 (1989-07-01), Holloway et al.
patent: 4931407 (1990-06-01), Maeda et al.
patent: 4975757 (1990-12-01), Egawa et al.
patent: 5030584 (1991-07-01), Nakata
patent: 5114874 (1992-05-01), Custode
patent: 5134448 (1992-07-01), Johnsen et al.
patent: 5153146 (1992-10-01), Toyoshima et al.
patent: 5244823 (1993-09-01), Adan
patent: 5256583 (1993-10-01), Hollinger
patent: 5266508 (1993-11-01), Azuma et al.
patent: 5266510 (1993-11-01), Lee
patent: 5270257 (1993-12-01), Shin
patent: 5320974 (1994-06-01), Hori et al.
patent: 5328864 (1994-07-01), Yoshizumi et al.
patent: 5330925 (1994-07-01), Lee et al.
patent: 5346587 (1994-09-01), Doan et al.
Semiconductor Devices-Physics and Technology, by S.M. Sze, Jan. 1985, p. 307.
Semiconductor Devices-Physics and Technology, by S.M.Sze, Jan. 1985, pp. 21-23.
G.G. Shahidi et al., Indium Channel Implant for Improved Short-Channel Behavior of Submicrometer NMOSFET's, IEEE Electron Device Letters, vol. 14, No. 8, Aug. 1983.
T. Ohguro et al., "Tenth Micron P-MOSFET's With Ultra-Thin Epitaxial Channel Layer Grown by Ultra-High-Vacuum CVD", IEDM Technical Digest, pp. 433-436, 1993.
D. Roddy, Introduction To MicroelectronicsSecond Edition, Pergamon Press, pp. 100-102, 1978.
Wold et al., Silicon Processing For The VLSI ERA, Lattice Press, pp. 308-311, 1986.
Richard C. Dorf, ed., The Electrical Engineering Handbook, CRC Press, pp. 581-584; pp. 1631-1635, 1993.
S.M. Sze, VLSI TechnologySecond Edition, McGraw-Hill, Inc., pp. 272-326, 1988, 1983.
S.M. Sze, VLSI TechnologySecond Edition , McGraw-Hill, Inc. 327-374, 1988, 1983.
Hillenius et al., "A symmetric Submicron CMOS Technology", IEDM Technical Digest, pp. 252-255, 1986.
I.C. Kizilyalli et al., "n+-Polysilicon Gate PMOSFET's With Indium Doped Buried-Channels", IEEE Electron Device Letters, vol. 17, No. 2, Feb. 1996, pp. 46-49.

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