PLL modulation circuit and polar modulation apparatus

Details PLL modulation circuit and polar modulation apparatus PLL modulation circuit and polar modulation apparatus

2007-01-02

2007-01-02

Kinkead, Arnold (Department: 2817)

Modulators

Frequency modulator

Plural modulation

C332S120000, C332S123000, C332S127000, C332S128000, C375S302000

Reexamination Certificate

active

11078704

ABSTRACT:
First and second calibration signals (308, 309) are sent to a frequency divider (102) and an adder (116) of a PLL section (100A), demodulated in a demodulator (111), filtered through a low pass filter (113) and a high pass filter (114) and thereafter sent to a modulation signal control circuit (115). The modulation signal control circuit (115) generates control information (318) in comparison with the phase and amplitude of the first and second calibration signals (308and309) and sends the control information (318) to a modulation control signal generator (106). Modulation control signal generator (106) holds the control information (318) and controls the values of the first modulation signal and second modulation signal sent to the frequency divider (102) and adder (116) on the based on the control information (318) held in modulation operation.

REFERENCES:
patent: 6211747 (2001-04-01), Trichet et al.
patent: 6933798 (2005-08-01), Hammes et al.
patent: 7015738 (2006-03-01), Cao

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