PLL circuit

Details PLL circuit PLL circuit

2007-03-29

2010-10-05

Kinkead, Arnold (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S017000, C331S034000, C331S17700V

Reexamination Certificate

active

07808326

ABSTRACT:
In a PLL circuit, a voltage controlled oscillator4has two voltage-current conversion circuits40and41and a selection circuit42for selecting an output of either one of the voltage-current conversion circuits40and41. The output of the voltage-current conversion circuit selected by the selection circuit42is inputted to a current controlled oscillator45. The one voltage-current conversion circuit41has an input thereof connected to an output of a loop filter3, while the other voltage-current conversion circuit40has an input thereof connected to an input terminal8for evaluating the oscillation characteristics of the voltage controlled oscillator4. As a result, time-varying fluctuations in the voltage of the loop filter resulting from a structure in which the input terminal for evaluating the oscillation characteristics of the voltage controlled oscillator is connected to the loop filter via a switch and time-varying fluctuations in the output frequency of the PLL circuit are effectively suppressed.

REFERENCES:
patent: 7327195 (2008-02-01), Sawada
patent: 2001/0052811 (2001-12-01), Kim
patent: 2003/0011247 (2003-01-01), Kajiwara et al.
patent: 2004/0251973 (2004-12-01), Ishida et al.
patent: 2006/0017477 (2006-01-01), Miki et al.
patent: 2007/0085612 (2007-04-01), Kodama
patent: 07-095069 (1995-04-01), None
patent: 09-252250 (1997-09-01), None
patent: 11-195983 (1999-07-01), None
patent: 2001-119297 (2001-04-01), None
patent: 2001-230667 (2001-08-01), None
patent: 2002-026727 (2002-01-01), None
patent: 2003-143836 (2003-05-01), None
patent: 2005-051732 (2005-02-01), None
patent: 2005-354317 (2005-12-01), None
patent: 2006-033197 (2006-02-01), None
patent: 2006-041810 (2006-02-01), None
patent: 2006-042352 (2006-02-01), None
patent: 2006-066971 (2006-03-01), None
Japanese Notice of Reasons for Rejection, with English Translation, issued in Japanese Patent Application No. 2007-540007, mailed Jan. 12, 2010.

Affiliated with

Also associated with

Rating

PLL circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with PLL circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and PLL circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4162271