Plasma treatment for silicon-based dielectrics

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S624000, C438S778000, C438S782000, C257SE21002

Reexamination Certificate

active

10843957

ABSTRACT:
An embodiment of the invention is a method of manufacturing a semiconductor wafer. The method includes depositing spin-on-glass material over the semiconductor wafer (step208), modifying a top surface of the spin-on glass material to form a SiO2layer (step210), applying a vapor prime (step212), forming a photoresist layer over the spin-on-glass material (step214), patterning the photoresist layer (step214), and then etching the semiconductor wafer (step216). Another embodiment of the invention is a method of manufacturing a dual damascene back-end layer on a semiconductor wafer. The method includes depositing spin-on-glass material over the dielectric layer and within the via holes (step208), modifying a top surface of the spin-on glass material to form a SiO2layer (step210), applying a vapor prime (step212), forming a photoresist layer over said spin-on-glass material (step214), patterning the photoresist layer (step214), and etching trench spaces (step216).

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patent: 6348407 (2002-02-01), Gupta et al.
patent: 6559070 (2003-05-01), Mandal
patent: 6911346 (2005-06-01), Ying et al.
patent: 6943431 (2005-09-01), Fukuyama et al.
patent: 2001/0012601 (2001-08-01), Fujii et al.
patent: 2005/0014362 (2005-01-01), Ho et al.
patent: 2005/0095840 (2005-05-01), Bhanap et al.

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