Etching a substrate: processes – Gas phase etching of substrate – Application of energy to the gaseous etchant or to the...
Patent
1995-10-13
1998-07-14
Tung, T.
Etching a substrate: processes
Gas phase etching of substrate
Application of energy to the gaseous etchant or to the...
1566251, 1566431, 1566461, 1566591, 216 41, 216 68, 216 70, 427569, 427571, 427575, 438710, 438723, 438758, H01L 2102
Patent
active
057799253
ABSTRACT:
A method of manufacturing a semiconductor device including the steps of: (a) transporting a semiconductor wafer into a plasma process system, the semiconductor wafer having a semiconductor layer, a field insulating film and a gate insulating film formed on the semiconductor layer, said gate insulating film having a breakdown voltage of B (V) and a thickness of 10 nm or thinner, a conductive layer of a structured antenna formed on the gate insulating film and the field insulating film, the conductive layer having an antenna ratio of 500 or higher, and an insulating material pattern formed on the conductive layer, the insulating material pattern having an opening with an aspect ratio larger than 1; and (b) processing the semiconductor wafer in plasma having an electron temperature of Te (eV) equal to or less than B. With this method, it is possible to prevent damages to a gate insulating film even during a fine pattern process.
REFERENCES:
patent: 5102687 (1992-04-01), Pelletter et al.
patent: 5474648 (1995-12-01), Patrick et al.
Samukawa, J. Vac. Sci. Technol., B9, 3(1991) month unavailable, pp. 1471-1477, "400khz RF Biased ECR Plasma Etching for Al-Si-Cu Patterning".
Samukawa, JPN. J. Appl. Phys., 30, 11B, (1991) month unavailable, pp. 3154-3158, "400khz Radio-Frequency Biased Electron Cyclotron Resonance Position Etching".
Wolf, "Silicon Processing for the VSLI ERA", vol. II, 1992 month unavailable, pp. 53, 237, 238.
Hasegawa Akihiro
Hashimoto Koichi
Hikosaka Yukinobu
Kamata Takeshi
Fujitsu Limited
Tung T.
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