Plasma processing

Details Plasma processing Plasma processing

2000-08-25

2003-03-04

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S788000, C438S758000, C438S778000, C438S913000, C118S715000, C118S72300R, C414S935000

Reexamination Certificate

active

06528435

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention is related to semiconductor processing, and more particularly to an improved plasma processing system and method for forming a dielectric layer and/or a thin film on a semiconductor substrate.
2. Description of the Related Art
Many processes are known for depositing film layers on semiconductor products. For example, plasma chemical vapor deposition is widely used in the semiconductor industry. This deposition process can be used for depositing such films as, SiO
2
, SiN, Ta
2
O
5
, Si epitaxy, dielectrics, metal films and others. A typical chemical vapor deposition process begins with the in-situ deposition of the reactants in a reaction deposition chamber. The reactant gases are introduced into the chamber through an inlet port and are excited to create ions or radicals by a high electric field created by an RF voltage. The electric field causes the inlet gas to become excited enough to form a glow discharge or plasma. Plasma enhanced deposition occurs when the molecules of the incoming gases are broken up in the plasma and the appropriate ions are recombined on the substrate surfaces to give the desired film.
The increased complexity of creating multilevel deposited films has greatly challenged known deposition methods. To enhance film quality, film deposition requirements have become more stringent.
One approach to enhance film quality is using dual frequency in PECVD processes. As shown in
FIG. 1
, a typical dual frequency PECVD configuration
10
includes a first electrode
12
and a second electrode
14
. First electrode
12
is electrically coupled to a 13.56 MHz RF generator through a high pass filter
16
and a matching network
18
. Second electrode
14
is a heated susceptor electrically coupled to a 300-400 KHz LF power supply through a low pass filter
20
and a matching transformer
22
. The combination of high and low frequency provides a stable discharge, generates the reactive species and assures coupling to substrate
24
, while providing the ion bombardment/implantation.
To increase throughput and enhance quality, the dual frequency PECVD configuration has been used in multistation sequential deposition chambers. As shown in
FIG. 2A
, a typical multistation sequential deposition chamber
26
includes a plurality of RF electrodes, such as electrodes
28
a
and
28
b
, and a base electrode
30
, which is coupled to an LF power supply. For example, in an N station system, a film layer 1/N of the total thin film thickness T (
FIG. 2B
) is deposited at each station.
Unfortunately, although the multistation approach can provide an increase in throughput, the approach can create a non-homogeneous thin film to develop on the surface of the wafer. The non-homogeneity occurs because at plasma ignition and at the completion of the plasma process, the plasma physical properties tend to be unstable. Therefore, whenever a thin film layer is formed, the layer tends to be non-homogenous at its top and bottom surfaces. In the multistation approach, the plasma on/off cycle is repeated at each station. Thus, non-homogenous interface portions I (
FIG. 2B
) can develop between each subsequently deposited layer.
Although an attempt is made to match each station of the multistation approach electrically (in parallel), the separate electrical connections made from each electrode to the power supply can create deposition uniformity problems. For example, the variability may occur simply due to the lengths of the cables used to power the electrodes.
For these reasons, what is needed is an improved process for depositing film on a substrate, metal barrier, or etch stop layer, such that the film exhibits, for example, improved chemical stability, deposition rate, uniformity of thickness, and adhesion characteristics.
SUMMARY OF THE INVENTION
The present invention provides an apparatus and method for depositing a thin film on a semiconductor substrate. In accordance with the present invention the apparatus includes a chamber or housing which is suited for holding a plurality of wafer platforms. The wafer platforms are arranged stacked in the chamber equidistant and electrically isolated from each other wafer platform. Advantageously, at least two of the plurality of wafer platforms are electrically coupled to a power source to form a first electrode and a second electrode. The remainder of the plurality of wafer platforms are disposed therebetween. In this manner, the first electrode and the second electrode form a single series capacitor. A reactant gas is provided in the chamber and reacted with sufficiently supplied energy to form a plasma. Radicals or ions from the plasma react on the surface of the wafers to cause a thin film layer to be distributed on the equally dispersed wafers positioned on a surface of the wafer platforms.
By forming a single series capacitor, which encompasses the plurality of wafers, the present invention subjects the wafers equally to ions or radicals formed in the plasma, which permits the formation of a uniform thin film. The present invention is geometry dependent, such that once the distance between each wafer platform is determined and fixed, no more adjustment is necessary. Thus, the matching condition between batches of processed wafers can be high, which means uniformity between batches of wafers is increased. Because the geometry is fixed no moving of electrodes is necessary. The lack of significant moving parts provides increased reliability of the system. Also, since the thin film is developed at one station, there is no formation of non-homogenous interfaces within the thin film. The geometry of the processing system dictates that the wafers be stacked, which reduces the overall footprint of the processing system.
These and other features and advantages of the present invention will be more readily apparent from the detailed description of the embodiments set forth below taken in conjunction with the accompanying drawings.


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