Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-09-06
2003-09-16
Goudreau, George (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S067000, C438S719000, C438S725000, C438S734000, C438S717000, C438S723000, C438S724000
Reexamination Certificate
active
06620737
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a method for forming trenches in a semiconductor substrate by plasma etching, in particular, a method for plasma etching of a silicon semiconductor substrate which is suitable for producing a semiconductor device.
Enhancement of the degree of integration of IC (semiconductor integrated circuit) is a constant problem, and micro-fabrication is always pursued. For example, in the formation of trenches (grooves or holes) required in an IC for memory such as DRAM, the aspect ratio (the ratio of length to width of the groove or hole) and the shape of section are especially important.
In this case, the aspect ratio is preferably 10 or more, and the shape of section is as follows from an idealistic viewpoint: as shown in FIG.
8
(
a
), the trench has a sidewall portion composed of a smooth plane, the angle of inclination of the sidewall portion is about 0° (perpendicular), and the bottom of the trench has a semicircular-concavity shape (a bottom-round shape). Here, the reason why the bottom-round shape is preferable is that the bottom-round shape facilitates operations in a subsequent step of embedding an insulating film.
However, the shape of section often becomes undesirable. As undesirable examples of the shape of section, there are known shapes of section called “etching residue” (shown in FIG.
8
(
b
)), “sub-trench” (shown in FIG.
8
(
c
)), “etch stop” (shown in FIG.
8
(
d
)), “bowing” (shown in FIG.
8
(
e
)), “side etch” (shown in FIG.
8
(
f
)) and the like.
As such a technique for forming trenches in a Si (silicon) semiconductor substrate, there is a technique comprising plasma etching. Such a technique has been disclosed, for example, in JP-A-11-135489.
This reference discloses a method in which trenches are formed in a silicon substrate by using as an etching gas a mixed gas comprising HBr (hydrogen bromide) gas as the main constituent and additional gases such as SF
6
(sulfur hexafluoride) gas, SiF
4
(silicon tetrafluoride) gas, He (helium), O
2
(oxygen), etc.
SUMMARY OF THE INVENTION
In the above prior art, no attention is paid to the employment of HBr gas as the main constituent, so that the etching rate and the yield are not sufficiently increased.
That is, in the above prior art, SiBr (silicon bromide) is produced as a reaction product because the main constituent of the etching gas is HBr. Since SiBr has a low vapor pressure, the etching rate is restricted. Thus, the etching rate cannot be increased.
Moreover, in the above prior art, reaction products such as SiO
x
Br
y
(wherein each of x and y is an integer) are produced in an etching chamber because the main constituent of the etching gas is HBr. Consequently, the reaction products adhering to, for example, the wall surface of the etching chamber are peeled to become fine particles, with an increase of the number of etching operations. Since contamination with the particles hinders the etching, the yield cannot be increased.
An object of the present invention is to provide a method for plasma etching of a semiconductor substrate which makes it possible to increase the etching rate and the yield in the formation of trenches.
The above object can be achieved by adopting a plasma etching method comprising forming trenches in a silicon semiconductor substrate by using a mask made of silicon oxide or silicon nitride or a composite film thereof, wherein the temperature of the silicon semiconductor substrate is maintained at 0° C. or lower and the trenches are formed by using a plasma etching gas comprising sulfur hexafluoride as the main constituent.
In this case, the above object can be also achieved when the aforesaid etching gas comprising sulfur hexafluoride as the main constituent contains oxygen. The above object can be also achieved by using as an etching gas a gas prepared by adding hydrogen bromide to the above-mentioned mixed gas prepared by adding oxygen to sulfur hexafluoride.
In addition, the above object can be also achieved by adopting a plasma etching method comprising forming trenches in a silicon semiconductor substrate by using a mask made of silicon oxide or silicon nitride or a composite film thereof, wherein the temperature of the silicon semiconductor substrate is maintained at 0° C. or lower, and the trenches are formed by using a plasma etching gas comprising carbon tetrafluoride as the main constituent and then a plasma etching gas comprising sulfur hexafluoride as the main constituent.
Furthermore, the above object can be also achieved by adopting a plasma etching method comprising forming trenches in an SOI semiconductor substrate by using a mask made of silicon oxide or silicon nitride or a composite film thereof, wherein the temperature of the SOI semiconductor substrate is maintained at 0° C. or lower, the trench formation is carried out to a depth corresponding to 70% to 90% of the thickness of the silicon semiconductor layer of said SOI semiconductor substrate by using a plasma etching gas comprising sulfur hexafluoride as the main constituent, and then the trench formation is further carried out to such a depth that the residual layer thickness, i.e., 30% to 10% of the thickness of the silicon semiconductor layer becomes zero, by using a plasma etching gas containing no fluorine.
REFERENCES:
patent: 5194118 (1993-03-01), Shinohara
patent: 5935874 (1999-08-01), Kennard
patent: 6084257 (2000-07-01), Petersen et al.
patent: 6127278 (2000-10-01), Wang et al.
patent: 11-135489 (1999-05-01), None
“Rie Lag In Diffractive Optical Element Etching”; Microelectronic Engineering; (2000); 54(3-4); pp. 315-322; Ting et al.
Kobayashi Hitoshi
Saito Go
Sakaguchi Masamichi
Tani Satoshi
Yoshigai Motohiko
Goudreau George
Hitachi , Ltd.
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