Plasma addressed liquid crystal display with organic-walled...

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S317000

Reexamination Certificate

active

06225029

ABSTRACT:

RELATED APPLICATIONS
1) Application, Ser. No. 08/361,078, filed Dec. 21, 1994, (5604-0375) and now U.S. Pat. No. 5,696,569.
2) Application, Ser. No. 08/407,536, filed Mar. 20, 1995, (5604-0379) and now U.S. Pat. No. 5,626,772.
3) Application, Ser. No. 08/413,052, filed Mar. 29, 1995, (5604-0382) and now U.S. Pat. No. 5,596,431.
4) Application, Ser. No. 08/535,697, filed Sep. 28, 1995, (5604-0385) and now U.S. Pat. No. 6,057,895.
BACKGROUND OF INVENTION
This invention relates to plasma-addressed liquid crystal display panels commonly referred to as “PALC” display devices. These devices comprise, typically, a sandwich of: a first substrate having deposited on it parallel transparent column electrodes, commonly referred to as “ITO” columns or electrodes since indium-tin oxides are typically used, on which is deposited a color filter layer; a second substrate comprising parallel sealed plasma channels corresponding to rows of the display crossing all of the ITO columns and each of which is filled with a low pressure ionizable gas, such as helium, neon and/or argon, and containing spaced cathode and anode electrodes along the channel for ionizing the gas to create a plasma, which channels are closed off by a thin transparent dielectric sheet; and a liquid crystal (LC) material located between the substrates. The structure behaves like an active matrix liquid crystal display in which the thin film transistor switches at each pixel are replaced by a plasma channel acting as a row switch and capable of selectively addressing a row of LC pixel elements. In operation, successive lines of data signals representing an image to be displayed are sampled at column positions and the sampled data voltages are respectively applied to the ITO columns. All but one of the row plasma channels are in the de-ionized or non-conducting state. The plasma of the one ionized selected channel is conducting and, in effect, establishes a reference potential on the adjacent side of a row of pixels of the LC layer, causing each LC pixel to charge up to the applied column potential of the data signal. The ionized channel is turned off, isolating the LC pixel charge and storing the data voltage for a frame period. When the next row of data appears on the ITO columns, only the succeeding plasma channel row is ionized to store the data voltages in the succeeding row of LC pixels, and so on. As is well known, the attenuation of each LC pixel to backlight or incident light is a function of the stored voltage across the pixel. A more detailed description is unnecessary because the construction, fabrication, and operation of such PALC devices have been described in detail in the following U.S. patents and publication, the contents of which are hereby incorporated by reference: Buzak et al., “A 16-Inch Full Color Plasma Addressed Liquid Crystal Display”, Digest of Tech. Papers, 1993 SID Int. Symp., Soc. for Info. Displ. pp. 883-886.
As will be appreciated from the foregoing description, the panel is an electronic array of data elements in the form of pixels and the plasma channel behaves as an addressing structure for the array in which selectively accessing an electrode in a channel in turn selectively ionizes a as to address one or more of the data elements.
A cross-section of the PALC display described in the 1993 SID Digest is shown in FIG.
2
. The method described in the referenced publication for making the plasma channels is to chemically etch a flat glass substrate to form parallel recesses defined by spaced ridges or mesas and to bond on top of the mesas a thin dielectric cover sheet having a thickness in the range of about 30-50 &mgr;m. In general, forming the plasma channels by wet etching, typically to a depth of about 100-150 &mgr;m, causes certain problems in obtaining uniformly sized channels and is time consuming, as well. The uniformity problem is due to such factors as inhomogeneity of etch velocity, roughness of the channel walls, and local defects in the mesas, the structure that separates the multiple channels.
In order to make the cover sheet of the plasma channel part more rigid, U.S. Pat. No. 5,214,521 proposed a construction in which the electrodes are deposited on a flat bottom plate while the top plate is eetched back to form channels shaped as hemi-cylinders—the inverse of that shown in FIG.
2
—in such a way that the remaining glass at the top of the channels is thin enough to allow addressing of the adjacent LC material. However, due to the circular curvature of the top plate, between the plasma discharge and the LC material, the glass thickness and thus the voltage drop over the LC material varies significantly for each pixel. In practical situations, this reduces the number of gray levels of the display.
U.S. Pat. No. 5,349,454 describes a construction wherein the electrodes are formed on a flat substrate, and on top of the electrodes are formed insulating ribs that constitute the lateral mesas or separating walls of each plasma channel, a flat thin dielectric sheet then being adhered to the tops of the ribs. This patent does not describe how the ribs are formed, but a commonly-assigned laid-open EPO application, No. 0 500 085 A2 describes the forming process as screen printing.
SUMMARY OF INVENTION
An object of the invention is an improved channel plate for an electronic array, in particular, a flat display device.
A further object of the invention is an improved plasma-addressed display device.
Another object of the invention is an improved method for fabricating the plasma channels of a PALC display device.
In accordance with a first aspect of the invention, a channel plate for an electronic array, in particular, a flat display device, comprises a substantially transparent substrate and a thin dielectric sheet-like member arranged over and spaced from the substrate by a plurality of mesas flanking and defining channels. Each of the mesas are formed by a patterned layer of an organic material. Preferably, the organic material is a polyimide material. Spaced electrode layers are provided in each channel. Preferably, the electrodes are provided on facing surfaces of each pair of mesas defining a channel.
In accordance with a first preferred embodiment of the invention, the display device is a PALC display device, and the combination of the substrate, spaced polyimide walls or mesas, and the overlying thin dielectric sheet-like member constitutes the plasma channels or channel plate of the PALC display device.
In accordance with a second aspect of the invention, the polyimide mesas are covered by one or more thin protective layers. Preferably, the protective layers are substantially transparent and electrically insulating, and are formed by a vapor-depositing technique. Polyimides are commonly employed as protective layers in the manufacture of certain semi-conductor devices. Such devices are typically not operated in an evacuated enclosure, much less in a gas adapted to create a plasma when activated. Hence, in the application of polyimides in semiconductors, protective layers are usually not needed for the polyimide material. In contrast, for application in the fabrication of channel plates for PALC display device, the polyimide mesas are present in a gas filled enclosure whose gas composition and purity control the operating performance of the plasma. Deterioration of vapors from the polyimide materials can have a deleterious effect on the operation of the channel plate. The presence of the protective layer or layers over the polyimide mesas protects them from ion bombardment when the plasma is generated and thus prevents deterioration into the plasma chamber.
In accordance with a first preferred embodiment of the method of the invention, a substrate is covered with a thick layer of polyimide, which is then covered with a thin layer of a photosensitive resist. Following exposure of the photoresist, the coated substrate is treated to develop the resist, following which the unexposed resist portions are removed leaving in place a patterned resist. The underlying polyimide portions are

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