Planarizing method for forming FIN-FET device

Details Planarizing method for forming FIN-FET device Planarizing method for forming FIN-FET device

2006-04-11

2006-04-11

Nguyen, Cuong (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S156000, C438S706000

Reexamination Certificate

active

07026195

ABSTRACT:
A method for forming a FIN-FET device employs a blanket planarizing layer formed upon a blanket topographic gate electrode material layer. The blanket planarizing layer is patterned and employed as a mask layer for patterning the blanket topographic gate electrode material layer to form a gate electrode. Since the blanket planarizing layer is formed as a planarizing layer, a photoresist layer formed thereupon is formed with enhanced resolution. As a result, the gate electrode is also formed with enhanced resolution. A resulting FIN-FET structure has the patterned planarizing layer formed in an inverted “U” shape upon the gate electrode.

REFERENCES:
patent: 6525403 (2003-02-01), Inaba et al.
patent: 6855989 (2005-02-01), Wang et al.

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