Planarized thin film surface covered wire bonded semiconductor p

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

174 522, 361392, 361393, 357 72, 357 74, H01L 2302, H05K 700

Patent

active

051515598

ABSTRACT:
This is a semiconductor chip in which the conductive path between the chip and the lead frame via wires can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point. This is accomplished by placing an insulating layer on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires. The insulating layer is a thermosetting adhesive and is placed over the lead frame, the bonding wires and the active face of the semiconductor chip so that when a lamination force is applied to the insulating layer the wires will be crushed and held against their respective pads and against the respective leads to which they are connected and the active face of the semiconductor protected by the adhesive bonding thereto. In this way greater contact between the wires and the leads is enhanced and defects or failure in conductivity therebetween reduced or eliminated.

REFERENCES:
patent: 4642716 (1987-02-01), Wakabayashi et al.
patent: 4707725 (1987-11-01), Ito
patent: 4763407 (1988-08-01), Abe
patent: 4827328 (1989-05-01), Ozawa et al.
patent: 5065281 (1991-11-01), Hernandez et al.
patent: 5097317 (1992-03-01), Fujimoto et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Planarized thin film surface covered wire bonded semiconductor p does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Planarized thin film surface covered wire bonded semiconductor p, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Planarized thin film surface covered wire bonded semiconductor p will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1970053

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.