Planarization process for wide trench isolation

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156646, 156648, 156653, 156657, 1566591, 156662, 20419237, 437 67, 437228, H01L 21306, B44C 122, C03C 1500, C03C 2506

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048368857

ABSTRACT:
A method of planarizing wide dielectric filled isolation trenches formed in the surface of a semiconductor surface is described. A self aligned mask is formed on the thick conformal layer of dielectric in the depressions over the wide trenches to protect the dielectric in those trenches from etching during planarization steps. The mask material is chosen to have etch characteristics different from the dielectric layer and a subsequent planarizing organic layer to allow selective etching of the mask material or dielectric without etching the other materials in the structure.

REFERENCES:
patent: 4385975 (1983-05-01), Chu et al.
patent: 4389281 (1983-06-01), Anantha et al.
patent: 4506434 (1985-03-01), Ogawa et al.
patent: 4545852 (1985-10-01), Barton
patent: 4654120 (1987-03-01), Dougherty
patent: 4671851 (1987-06-01), Beyer et al.
patent: 4671970 (1987-06-01), Keiser et al.
Bartush et al., "Dielectric Isolation Planarization," IBM Technical Disclosure Bulletin, vol. 21, No. 5, Oct. 1978, pp. 1868-1869.
Tsang, "Forming Wide Trench Dielectric Isolation," IBM Technical Disclosure Bulletin, vol. 25, No. 11B, Apr. 1983, pp. 6129-6130.

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