Planarization of a non-conformal device layer in semiconductor f

Details Planarization of a non-conformal device layer in semiconductor f Planarization of a non-conformal device layer in semiconductor f

1998-11-06

1999-12-14

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

216 38, 438719, 438756, H01L 2100

Patent

active

060017406

ABSTRACT:
A substantially planar surface is produced from a non-conformal device layer formed over a complex topography, which includes narrow features with narrow gaps and wide features and wide gaps. A conformal layer is deposited over the non-conformal layer. The surface is then polished to expose the non-conformal layer over the wide features. An etch selective to the non-conformal layer is then used to substantially remove the non-conformal layer over the wide features. The conformal layer is then removed, exposing the non-conformal layer. The thickness of the non-conformal layer is now more uniform as compared to before. This enables the polish to produce a planar surface with reduced dishing in the wide spaces.

REFERENCES:
patent: 5362669 (1994-11-01), Boyd et al.
patent: 5494857 (1996-02-01), Cooperman et al.
patent: 5674783 (1997-10-01), Jang et al.

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