Planarization method and technique for isolating semiconductor i

Details Planarization method and technique for isolating semiconductor i Planarization method and technique for isolating semiconductor i

1985-06-27

1987-05-05

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29576W, 29580, 156646, 156649, 156651, 156653, 156657, 1566611, 156668, B44C 122, C03C 1500, C03C 2506, B29C 1708

Patent

active

046629866

ABSTRACT:
A technique for producing planarized semiconductor surfaces and for isolating semiconductor islands.

REFERENCES:
patent: 4307179 (1981-12-01), Chang et al.
patent: 4389281 (1983-06-01), Anantha et al.
patent: 4470874 (1984-09-01), Bartush et al.
patent: 4505025 (1985-03-01), Kurosawa et al.
Bartush et al., Dielectric Isolation Planarization, IBM Technical Disclosure Bulletin, vol. 21, No. 5, Oct. 1978, pp. 1868-1869.
Kinney et al., Method for Producing Single Crystal Silicon on an Insulating Substrate, IBM Tech. Discl. Bulletin, vol. 24, No. 6, Nov. 1981, pp. 2955-2957.
Tsang, Forming Wide Trench Dielectric Isolation, IBM Tech. Discl. Bulletin, vol. 25, No. 11B, Apr. 1983, pp. 6129-6130.
Eiden et al., "Geometry Independent Deep Trench Etching, Refill and Planarization for Isolation of Merged Bipolar-CMOS Devices", Extended Abstracts, vol. 84-2, The Electrochemical Society, Incorporated, Fall Meeting, Oct. 7-12, 1984, Abstract No. 398, pp. 570-571.

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