Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2011-03-08
2011-03-08
Menz, Laura M (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C324S763010
Reexamination Certificate
active
07902548
ABSTRACT:
An integrated circuit and e-beam testing method are disclosed. The integrated circuit includes a test structure with a ground grid, a metal pad having a space therein and positioned within the ground grid, and a metal line connected to the ground grid and positioned in the space. Structures for detecting open circuits and short circuits are described.
REFERENCES:
patent: 5054097 (1991-10-01), Flinois et al.
patent: 5315130 (1994-05-01), Hively et al.
patent: 5648661 (1997-07-01), Rostoker et al.
patent: 6285040 (2001-09-01), Sanada
patent: 6359451 (2002-03-01), Wallmark
patent: 6407564 (2002-06-01), Tseng
patent: 6433561 (2002-08-01), Satya et al.
patent: 6445199 (2002-09-01), Satya et al.
patent: 6509197 (2003-01-01), Satya et al.
patent: 6524873 (2003-02-01), Satya et al.
patent: 6528818 (2003-03-01), Satya et al.
patent: 6566885 (2003-05-01), Pinto et al.
patent: 6576923 (2003-06-01), Satya et al.
patent: 6589860 (2003-07-01), Ang et al.
patent: 6621274 (2003-09-01), Wallmark
patent: 6633174 (2003-10-01), Satya et al.
patent: 6636064 (2003-10-01), Satya et al.
patent: 6771806 (2004-08-01), Satya et al.
patent: 6867606 (2005-03-01), Walker et al.
patent: 6921672 (2005-07-01), Satya et al.
patent: 6995393 (2006-02-01), Weiner et al.
patent: 7012439 (2006-03-01), Pinto et al.
patent: 7067335 (2006-06-01), Weiner et al.
patent: 7105917 (2006-09-01), Cho et al.
patent: 7160741 (2007-01-01), Lim et al.
patent: 7179661 (2007-02-01), Satya et al.
patent: 7297453 (2007-11-01), Watson et al.
patent: 7303842 (2007-12-01), Watson et al.
patent: 7355216 (2008-04-01), Yang et al.
patent: 7655482 (2010-02-01), Satya et al.
patent: 7656170 (2010-02-01), Pinto et al.
patent: 2002/0089333 (2002-07-01), Wallmark
patent: 2003/0071262 (2003-04-01), Weiner et al.
patent: 2005/0098780 (2005-05-01), Lim et al.
patent: 2006/0118784 (2006-06-01), Lee et al.
patent: 2006/0245636 (2006-11-01), Kitamura et al.
patent: 2008/0130982 (2008-06-01), Kitamura et al.
Chan Tze Ho Simon
Lim Seng-Keong Victor
Tan Dennis
Chartered Semiconductor Manufacturing Ltd.
Ishimaru Mikio
Menz Laura M
LandOfFree
Planar voltage contrast test structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Planar voltage contrast test structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Planar voltage contrast test structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2674628