Planar third dimensional memory with multi-port access

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S158000, C365S230030, C365S054000, C365S063000

Reexamination Certificate

active

07633789

ABSTRACT:
Embodiments of the invention relate generally to a planar third dimensional memory with multi-port access, the planar third dimensional memory including memory planes composed of a plurality of memory layers. The memory layers can include non-volatile memory elements. The planar third dimensional memory can also include insulation layers, each being formed to separate a memory layer from another memory layer, and a logic plane configured to control access to the plurality of memory planes. In some cases, the memory planes can be formed vertically above the logic plane. The logic plane can be formed in a substrate, such as a semiconductor wafer, for example. The planar third dimensional memory can include a multi-port interface that can be configured to provide access between a plurality of ports and the plurality of memory planes.

REFERENCES:
patent: 6839269 (2005-01-01), Iwata et al.
patent: 7394717 (2008-07-01), Hidaka
Saleh, Res “SRAM Cell and col. I/O Design”, EECE481 Lecture 18, Dept. of ECE, University of British Columbia, Mar. 16, 2005, pp. 1-10.

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