Planar reflective light valve backplane

Details Planar reflective light valve backplane Planar reflective light valve backplane

1998-12-23

2001-06-26

Healy, Brian (Department: 2874)

Optical waveguides

Integrated optical circuit

C385S129000, C385S130000, C385S131000

Reexamination Certificate

active

06252999

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to planarized, wafer-based integrated circuits, and more particular ly to a novel planar integrated circuit having optical elements disposed on its surface.
Even more particularly the invention relates to a novel, planar, wafer-based reflective light valve backplane.
2. Description of the Background Art
Wafer-based reflective light valves have many advantages over their transmissive predecessors. For example, conventional transmissive displays are based on thin-film transistor (TFT) technology whereby the displays are formed on a glass substrate, with the TFTs disposed in the spaces between the pixel apertures. Placing the driving circuitry between the pixel apertures limits the area of the display available for light transmission, and therefore limits the brightness of transmissive displays. In contrast, the driving circuitry of reflective displays is located under reflective pixel mirrors, and does not, therefore, consume valuable surface area of the display. As a result, reflective displays are more than twice as bright as their transmissive counterparts.
Another advantage of wafer-based reflective displays is that they can be manufactured with standard CMOS processes, and can therefore benefit from modern sub-micron CMOS technology In particular, the reduced spacing between pixel mirrors increases the brightness of the display, and reduces the pixelated appearance of displayed images. Additionally, the CMOS circuitry switches at speeds one or more orders of magnitude faster than comparable TFT circuitry, making wafer-based reflective displays well suited for high speed video applications such as projectors and camcorder view finders.
FIG. 1
is a cross-sectional view of a prior art reflective display backplane
100
, which is formed on a silicon substrate
102
, and includes a layer
104
of integrated circuitry, an insulating support layer
106
, a plurality of pixel mirrors
108
, and a protective oxide layer
110
. Each of pixel mirrors
108
is connected, through an associated via
112
, to the circuitry of layer
104
. Backplane
100
is typically incorporated into a reflective light valve (e.g., a liquid crystal display) by forming a layer
114
of an optically active medium (e.g., liquid crystal) over the pixel mirrors, and forming a transparent electrode (not shown) over the optically active medium. Light passing through the medium is modulated (e.g., polarization rotated), depending on the electrical signals applied to pixel mirrors
108
.
One problem associated with prior reflective displays is that the generated images often appear mottled. One source of mottling in reflective displays is the non-uniform alignment of the liquid crystals in layer
114
. The formation of liquid crystal layer
114
typically includes a wiping or rubbing step, wherein a roller or similar object is passed over the liquid crystal layer, resulting in alignment of the liquid crystals. However, pixel mirrors
108
project upward from the surface of backplane
100
, defining gaps between adjacent pixel mirrors. Known wiping processes are ineffective to align the liquid crystals (represented by arrows in layer
114
) in these gaps. Additionally, the misaligned crystals adversely affect the alignment of neighboring crystals in layer
114
.
What is needed is a reflective backplane with a planar surface to facilitate the effective alignment of the entire liquid crystal layer.
In many cases (e.g., substrates including optical elements) it is necessary to maintain strict control over the thickness of films remaining on the surface, because the thickness of films over optical elements is often critical to the proper optical functionality of the element.
What is also needed, therefore, is a method for planarizing the surface of substrates having optical elements disposed on their surface, while maintaining control over the thickness of any layers remaining, over the optical elements.
SUMMARY
The present invention overcomes the limitations of the prior art by providing a novel wafer based device (e.g., a reflective display backplane) including a plurality of surface projections (e.g., pixel mirrors) and a fill layer filling the gaps between the surface projections. Together, the surface projections and the fill layer form a planar surface of the device. Where the substrate is a reflective display backplane, the resulting planar surface facilitates the effective alignment of liquid crystal materials deposited thereon.
A disclosed embodiment includes a substrate having a plurality of surface projections defining gaps therebetween,- an etch-resistant layer formed on the substrate, and a fill layer formed on a portion of the etch-resistant layer in the gaps. In a particular embodiment, the substrate is an integrated circuit, and the surface projections are optical elements. In a more particular embodiment, the substrate is a reflective display backplane, and the surface projections are pixel mirrors.
In one embodiment, the fill layer is a spin-on-coating, for example spin-on-glass. Optionally, the fill layer can be doped with a light absorbing dopant, such as colored dye.
The etch-resistant layer may include an optical thin film layer, and may be formed as a single layer. Optionally, the etch-resistant layer includes a plurality of sublayers, for example an optical thin film layer and an etch-resistant cap layer. In one embodiment, the optical thin film layer is an oxide layer, and the etch-resistant cap layer is a nitride layer.
A more particular embodiment further includes an optional protective layer formed over the etch-resistant layer and the fill layer. The protective layer may be formed as a single layer or, optionally, may include a plurality of sublayers. For example, in a disclosed embodiment, the protective layer includes an oxide layer and a nitride layer.
The protective layer also fills in any step-down from the top surface of the etch-resistant layer overlying the pixel mirrors and the top surface of the fill layer remaining in the gaps, formed by over-etching the fill layer. Where the step-down is less than or equal to 1200 Å, the protective layer is sufficient to fill the step-down and form a planar surface on the wafer-based device.


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