Planar circuit fabrication by plating and liftoff

Details Planar circuit fabrication by plating and liftoff Planar circuit fabrication by plating and liftoff

1981-02-05

1982-07-13

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29580, 156655, 156657, 1566591, 156668, 357 71, 365 37, 365 39, 427 89, 427 91, 427 92, 427131, 430313, 430317, 204192C, B44C 122, C03C 1500, C03C 2506, B29C 1708

Patent

active

043393055

ABSTRACT:
The method of manufacturing predetermined microcircuit conductor patterns, which includes forming on the surface plane of a substrate a layer of insulator material, forming a layer of resist on the layer of insulator material, patterning the layer of resist to define a channel pattern, etching the channel pattern with relatively overwide channels, conditioning the channel bases to receive plating material, and thereafter filling the overwide channels with the plating material to a height at least substantially co-planar with the insulator material to define the predetermined conductor patterns, removing the mask and plated material thereon to uncover completely the conductor pattern.

REFERENCES:
patent: 3567508 (1971-03-01), Cox et al.
patent: 3985597 (1976-10-01), Zielinski
patent: 4076575 (1978-02-01), Chang
patent: 4251319 (1981-02-01), Bonnie et al.
IBM Technical Disclosure Bulletin, vol. 18, No. 11, Apr. 1976, Producing Contacts For Integrated Semiconductor Devices by A. Bohg et al. pp. 3734-3735.
IBM Technical Disclosure Bulletin, vol. 17, No. 2, Jul. 1974, Lift-Off Method of Fabricating Thin Films by L. R. Weaver, pp. 351-352.

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