Planar byte memory organization with linear access

Details Planar byte memory organization with linear access Planar byte memory organization with linear access

2005-01-25

2005-01-25

Bella, Matthew C. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Addressing

C345S562000, C345S565000, C345S566000, C345S570000, C345S571000

Reexamination Certificate

active

06847370

ABSTRACT:
A graphics memory architecture in which row addresses are permuted, in a basically tile-oriented storage architecture, so that fast parallel access is provided both by scanlines (for video operations) and also by tiles (for graphics operations).

REFERENCES:
patent: 5311211 (1994-05-01), Simpson
patent: 5841446 (1998-11-01), Dai

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