Placing a computer system into a sleeping state

Details Placing a computer system into a sleeping state Placing a computer system into a sleeping state

1999-08-30

2003-06-24

Lee, Thomas (Department: 2185)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S323000

Reexamination Certificate

active

06584573

ABSTRACT:

TECHNOLOGICAL FIELD
The invention relates to placing a computer system into a sleeping state.
BACKGROUND
The “Advanced Configuration and Power Interface Specification” (“ACPI Specification”), version 1.0, published in February 1998, by Intel Corporation, Microsoft Corporation, and Toshiba K.K., defines several sleeping states that allow a computer to enter one of several reduced power modes with a corresponding level of system context preservation. One of these sleeping states, the “S
1
” state, is associated with low wake-up latency and full system context preservation.
For most computers, the “S
1
” state is a “stop clock” state, in which the computer's processor “snoops” transactions between other computer components to maintain cache coherency, but the processor itself does not carry out transactions. A wide variety of events typically cause a computer to exit the “S
1
” sleeping state, including wake events from the computer's real-time clock, from PCI devices such as modems and network interface cards (NICs), from USB compliant peripherals such as keyboards and multimedia components, and from the computer's power-wake button, or front panel switch.
Some computer systems, such as those based on the Intel 32-bit (IA-32) architecture, include a simple “hardware handshake” mechanism that supports low wake-up latency sleeping states like the “S
1
” state. This mechanism involves the assertion and deassertion of a control signal, known as the STPCLK# signal, each time a system sleep event or a recognized wake event occurs. The computer's processor receives the STPCLK# signal directly and, in response to assertion of the signal, temporarily halts program execution.
Other computer systems, such as those based on the Intel 64-bit (IA-64) architecture, are not designed to support low wake-up latency sleeping states like the “S
1
” state. In particular, processors that implement the IA-64 architecture do not recognize the STPCLK# signal and therefore do not enter a sleeping state when the STPCLK# signal is asserted. Therefore, these systems do not comply with the “PC 99 System Design Guide” (“PC 99”), published by Intel Corporation and Microsoft Corporation in August 1998, which requires the system to support the ACPI “S
1
” sleeping state.
SUMMARY
The systems and techniques described here allow computer manufacturers to support low wake-up latency sleeping states, such as the ACPI “S
1
” state, in computer systems not originally designed to support such states. One resulting benefit is that only minor modifications are needed to bring existing computer architectures into compliance with the PC 99 standard. For example, the Intel IA-64 architecture becomes PC 99 compliant by adding only a few hardware components and modifying the operation of system BIOS only slightly.
The invention involves a computer's entry into or exit from a sleeping state, such as the ACPI “S
1
” state, in which program execution halts. Upon detecting a sleep or wake event, a system component generates a sleep or wake signal that instructs the computer to enter or exit the sleeping state. This sleep or wake signal is of a type to which the computer's processor does not respond. Therefore, another system component, such as BIOS, takes steps that cause the processor to halt program execution.
Other embodiments and advantages will become apparent from the following description and from the claims.


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www.teleport.comweb page, “Global System State Definitions”.

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