Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-02-15
2005-02-15
Whitmore, Stacy A. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06857115
ABSTRACT:
Application of network flow techniques to constrained optimization problems is disclosed. The present of constrains may lead to infeasible solutions. The infeasible solutions can be removed by an iterative process of changing the structure of the network and/or the associated parameters. Specific applications of the invention to the placement of tristate buffers and clocks in integrated circuits are disclosed.
REFERENCES:
patent: 6389580 (2002-05-01), Ozaki
patent: 20030005398 (2003-01-01), Cho et al.
U.S. Appl. No. 10/215,601, filed Aug. 8, 2002, Dasasathyan et al.
U.S. Appl. No. 10/215,979, filed Aug. 8, 2002, Anderson et al.
Anderson Jason H.
Dasasathyan Srinivasan
Nag Sudip K.
Stenz Guenter
Chan H. C.
Hoffman Bernard
Whitmore Stacy A.
Xilinx , Inc.
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