Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-03-20
2003-09-30
Lam, Tuan T. (Department: 2816)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06629305
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a placement
et wiring processing system, and more particularly to a placement
et wiring processing system in which operations for processing of placement and net wiring are eased and simplified in an editor for processing placement and net wiring on an editor screen in an interactive fashion.
2. Description of the Related Art
In recent years, as in the case of CAD, computers have been in extensive use for designing products or the like.
For example, in designing LSIS, PCBs or the like, several millions of elements are integrated in a chip, and those elements are connected to each other through a network. The level of this type of work is far beyond the ability of human beings if they try to do such work manually. Then, to cope with such work, automation using computers has become essential in designing LSIS and PCBs.
With such automated designing, since an LSI can be automatically designed from its logic design through packaging design and diagnosis, the automated designing is significant as a tool for supporting the layout design of the LSI at a high degree in developing a large-scale and high-performance LSI within a short period of time.
To cope with this, there already exist a number of editors with which a man or woman can process the placement or net wiring in an LSI in an interactive fashion on the screens of the editors when he or she tries to design the placement in the LSI.
While there have already existed a number of editors with which a man or woman can process the placement or net wiring in an LSI, PCB and the like in an interactive fashion, most of them are intended for automatic placement and fine adjustments after net wiring is completed, and therefore work such as placing or moving cells and adding, deleting or modifying the net wiring can not be carried out with ease when a data has lots of cells and net wiring. To cope with this, a function of assisting such work is required.
In addition, for users who develop LSIs, PCBs or the like, in a case where they develop large-scale LSIs, PCBs or the like, a number of operators are assigned to concurrently design placements of blocks resulting after a chip is divided. In addition to that, the number of kinds of LSIs to be developed is enormous, and therefore program modifications, such as changes and updates are carried out frequently by the placement
et wiring processing program which is executed in an editor with a view to dealing with the enormous number of kinds of LSIs developed.
Due to this, with the aforesaid editor, when the program is modified at a server unit, the work of the operators is interrupted, thus decreasing the working efficiency. Furthermore, when the server unit fails, the work of many of the operators is interrupted, thus causing a problem.
In addition, the layout design of an LSI is carried out in such a manner as to sequentially proceed from the upstream towards the downstream in several processes. It is desirable to keep the consistency between the processes such that an output data from a certain process automatically becomes an input to the following process, so that re-entry of design data can be avoided.
Due to this, when certain work is processed by executing a plurality of programs sequentially, it is necessary to confirm that a series of operations is carried out properly without omission. As is disclosed in Japanese Unexamined Patent Publication (Kokai) No. 5-12037, there is proposed as a means for dealing with this a method for automatically carrying out a series of operations while determining which operation is to be continued, based on ending codes related to the operations.
However, with this method, since it is not possible to proceed to the following work before the ending code of the current work has been confirmed, as in the case with the layout design work of an LSI chip, it is not possible to proceed with execution of a program as it is for the time being even if some errors are detected in the course of the execution of the program. This causes a problem that the working efficiency of the operators is deteriorated.
Although errors themselves must be corrected, they do not have to actually be so done every time an error occurs provided that a series of operations is ensured to be carried out without omissions and errors in the end. To make this happen, it is necessary to carry out the management of the execution history of respective programs and work history of objects and events in an ensured fashion.
Additionally, in an editor for processing the placement
et wiring in an LSI, for example, in an interactive fashion or a general editor, in order for a series of operations to be carried out without omissions and errors in designing the layout of the LSI, it is imperative in layout design to ease placing or moving cells or adding, deleting or modifying net wiring for data involving a number of cells and an extensive net wiring to thereby improve the workability of operators.
Thus, an object of the present invention is to provide a placement
et wiring processing system with various operational functions so that operations for placing or moving a number of cells or adding, deleting or modifying the net wiring can be performed easily and simply when designing placements to thereby carry out a series of operations properly without omissions.
SUMMARY OF THE INVENTION
With a view to solving the aforesaid problem, according to an aspect of the present invention, there is provided a placement
et wiring processing system comprising at least a control means for controlling the execution of a program for operating and processing placements
et wiring, a display means for displaying on its screen information related to the placements
et wiring so processed, an operating and processing means for operating and processing the placements
et wiring on the screen of the display means, and an information management means for managing the information related to the placements
et wiring. Operations for placing or moving cells and adding, deleting or modifying the net wiring can be done by the system.
The control means copies the program so read out and thereafter executes the copied program, and the information management means stores execution history information of the placement
et wiring processing program once the program is executed.
The control means is also designed to check the placement
et wiring processing operated by the program based on the stored execution history information.
Additionally, according to another aspect of the present invention, a placement
et wiring processing system through an interactive editor comprising at least a control means for controlling the execution of a program for operating and processing placements
et wiring, a display means for displaying on an editor screen information related to the placements
et wiring, an operating and processing means for operating the placements
et wiring on the editor screen, and an information management means for managing the information related to the placements
et wiring.
The information control means can store modified information resulting when the placement
et wiring graphic information is operated to be modified on the editor screen, and the display means can display on the editor screen the modified information so stored. Furthermore, when the displayed placement
et wiring graphic information is sequentially selected and designated, the display means displays the contents associated with the placement
et wiring graphic information so selected and designated.
When the control means reads out processing-related information on the placement
et wiring which is stored in a storage unit and is designated by the user, the display means displays on the editor screen the read out information in association with the placement
et wiring graphic information.
REFERENCES:
patent: 6035111 (2000-03-01), Suzuki et al.
patent: 6240541 (2001-05-01), Yasuda et al.
patent: 6260177 (2001-07-01), Lee et al.
patent: 6298468 (2001-10
Hanamitsu Hiroaki
Isomura Tomoyuki
Ito Noriyuki
Katagiri Hideaki
Osawa Keiko
Fujitsu Limited
Lam Tuan T.
Nguyen Hiep
Staas & Halsey , LLP
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