Image analysis – Applications – Manufacturing or product inspection
Reexamination Certificate
1998-07-07
2002-04-02
Mancuso, Joseph (Department: 2721)
Image analysis
Applications
Manufacturing or product inspection
C382S147000, C348S014160
Reexamination Certificate
active
06366690
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the inspection of surfaces, particularly the surfaces of semiconductor wafers, intended for the detection of possible defects, particularly due to the presence of particles. More particularly the invention relates to the control of semiconductor manufacturing processes, particularly Quality Control, Process Monitoring and Control and Catastrophe Detection. The invention further comprises method and apparatus for the inline control of wafer production and the immediate recognition of any fault or irregularities in the production line.
BACKGROUND OF THE INVENTION
The detection of defects and/or of the presence of foreign substances on semiconductor wafers has received considerable attention in the art. Defects can be caused by an imperfect production of the desired pattern. Further, particles of various kinds may adhere to a wafer surface for a number of reasons.
The inspection process can be carried out on bare wafers, viz. wafers that have not yet been patterned, or on patterned wafers. This invention relates primarily to the inspection of patterned wafers.
Prior art devices are used in order to detect defects and particles of the type described above in patterned wafers. Examples of prior art apparatus comprise devices based on the direct comparison of different dies. Such apparatus, which will be further referred to below with respect to specific references, presents the following drawbacks: 1) it is relatively very expensive, as it requires high mechanical precision; 2) it has low throughput; 3) it has a large footprint; 4) it needs an expert operator; 5) it is not suitable for inline inspection (i.e., it operates on wafers which have been previously removed from the fabrication line), and therefore is unsuitable for purposes of process control and monitoring, of the kind addressed by the present invention; 6) prior art devices are non-isotropic devices, i.e. they require a very precise alignment of the article being inspected. These facts impose constructive and operative constraints on the apparatus and on the inspection method.
U.S. Pat. No. 4,731,855, to Kyo Suda et al, includes in its Background of the Invention a list of various methods for performing semiconductor wafer inspections, and said list is incorporated herein by reference. One of said methods involves scanning the wafer surface with a laser beam and analyzing the number and direction of diffraction lights, produced by the pattern edges, by means of a plurality of light detection cells arranged cylindrically.
U.S. Pat. No. 4,345,312, to Toshikazu Yasuye et al, discloses a pattern inspecting method which comprises picking up an image from an article having a preset pattern whereby to extract the data of the pattern to be inspected, converting said data into a bit matrix of binary values, and comparing said matrix with a reference matrix representing an ideal pattern, to disclose any discrepancy between the pattern of the article and the ideal one.
U.S. Pat. No. 4,342,515, to Masakuni Akiba et al, discloses an inspection apparatus for determining the presence of foreign matters on the surface of a wafer, which apparatus includes a beam generator portion which projects a collimated beam towards the object to inspect it from a side thereof, and a mechanism which senses light reflected from the surface of the object, through a polarizer plate. Such methods, however, are obsolete inasmuch as they cannot be used with today's wafers having a design rule of 0.5 &mgr;m or less.
The same principle is used in several prior art methods and apparatus. Thus, in U.S. Pat. No. 4,423,331, to Mitsuyoshi Koizumi et al, the light reflected from the wafer surface is directed to a photoelectric tube and defects are detected by the irregularities of the voltage current outputted by the tube.
U.S. Pat. No. 4,669,875, to Masataka Shiba et al, makes reference to the aforesaid U.S. Pat. No. 4,342,515, and proposes a method and apparatus based on the same principle, in which a polarized laser beam irradiates the substrate from directions inclined with respect to the perpendicular to its surface and linearly scans said surface; and light reflected from foreign particles is detected by a polarized light analyzer sand a photoelectric conversion device.
The aforesaid U.S. Pat. No. 4,731,855 discloses a method of detecting defects, e.g. foreign particles, in which the diffraction light reflected from a wafer surface is analyzed by distinguishing between normal and abnormal directions. An ideal pattern formed on a wafer reflects diffraction lights in determined directions, at certain angles, which are considered normal directions. On the other hand, foreign particles reflect the light in other, abnormal directions. Reflection of light in abnormal directions indicates a departure of the pattern formed on the wafer from the real pattern, and therefore possible defects. In the invention of this reference, the abnormal direction signals are so applied as to determine whether they represent a true defect or a practically acceptable defect. Again, this method is obsolete due to the design rule of less than 1 &mgr;m.
U.S. Pat. No. 4,814,596, to Mitsuyoshi Koizumi et al, applies the said principle of analyzing polarized reflected light to identify defects. It cites the aforesaid U.S. Pat. No. 4,342,515 as well as Japanese Patent Applications Publication Nos. 54-101390, 55-94145 and 56-30630. In the apparatus of this reference, an S-polarized beam is arranged to illuminate the pattern present on the wafer. Since the irregularities in the surface of the pattern are sufficiently small, the S-polarized light is preserved in the reflected light. An analyzer is used to cut the S-polarized light in the path of the reflected light, so that, if the reflected light includes a P-polarized light, this latter is detected by a photoelectric conversion element, indicating the presence of particles on the wafer.
U.S. Pat. No. 4,628,531, to Keiichi Okamoto et al, discloses a pattern checking apparatus, which reveals by a primary selection the presence of defects that may be tolerable or not, defined as “candidate defects”. The wafers having such defects are passed to a secondary selection, which distinguishes between those that are not defects in a practical sense and are acceptable, and those that are not acceptable. False alarms, viz. the detection in the primary selection of apparent defects, which are revealed in the secondary selection not to be real defects, are said to be caused, in prior art methods based on the comparison of patterns, by an imperfect registration of the patterns to be compared.
Another method of the prior art relates to inspection apparatus employing a planar array of individually addressable light valves for use as a spatial filter in an imaged Fourier plane of a diffraction pattern, with valves having a stripe geometry corresponding to positions of members of the diffraction pattern, blocking light from those members. The remaining valve stripes, i.e. those not blocking light from diffraction order members, are open for transmission of light. Light directed onto the surface, such as a semiconductor wafer, forms elongated curved diffraction orders from repetitive patterns of circuit features. The curved diffraction orders are transformed to linear orders by a Fourier transform lens. Various patterns of stripes can be recorded and compared. Related discussion can be found in U.S. Pat. No. 4,000,949 and 4,516,833.
U.S. Pat. No. 5,699,447 discloses and claims an apparatus which comprises first examining means for examining in a first phase the complete surface of the wafer with an optical beam of small diameter and for outputting information, indicating inspected locations on the article's surface having a high probability of a defect, storage means for storing the output of the first examining means, and second examining means for examining in a second phase and with a relatively high spatial resolution only the locations having a high probability of a defect and for outputting inform
Lapidot Zvi
Sherman Rivi
Smilansky Zeev
Tsadka Sagie
Applied Materials Inc.
Bali Vikkram
Mancuso Joseph
Sughrue, Mion, Zinn, MacPeak and Seas LLP
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