Pitch reduction integrating formation of memory array and...

Semiconductor device manufacturing: process – Chemical etching

Reexamination Certificate

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C438S258000

Reexamination Certificate

active

11009496

ABSTRACT:
Methods and apparatus for providing a memory array fabrication process that concurrently forms memory array elements and peripheral circuitry. The invention relates to a method for fabricating memory arrays using a process that concurrently forms memory array elements and peripheral circuitry and results in a reduction in pitch.

REFERENCES:
patent: 6376294 (2002-04-01), Tzeng et al.
patent: 6395596 (2002-05-01), Chien et al.
patent: 6403417 (2002-06-01), Chien et al.
patent: 6518125 (2003-02-01), Chang
patent: 2003/0027420 (2003-02-01), Lai et al.
patent: 2003/0134478 (2003-07-01), Lai et al.
patent: 2005/0079722 (2005-04-01), Yu
patent: 05-190811 (1993-07-01), None
patent: 06-151876 (1994-05-01), None

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