Pitch reduced patterns relative to photolithography features

Details Pitch reduced patterns relative to photolithography features Pitch reduced patterns relative to photolithography features

2010-04-28

2011-11-01

Luu, Chuong A (Department: 2813)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S725000, C257SE21231

Reexamination Certificate

active

08048812

ABSTRACT:
Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern. Pitch multiplication is accomplished by patterning an amorphous carbon layer. Sidewall spacers are then formed on the amorphous carbon sidewalls which are then removed; the sidewall spacers defining the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is transferred to the BARC. The combined pattern is transferred to an underlying amorphous silicon layer. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, is then etched into the underlying substrate.

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