Pipelined parallel programming operation in a non-volatile...

Details Pipelined parallel programming operation in a non-volatile... Pipelined parallel programming operation in a non-volatile...

2007-01-09

2007-01-09

Lane, Jack A. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S150000, C711S168000, C711S169000, C710S053000, C365S185110, C365S189040, C365S189050, C365S230030

Reexamination Certificate

active

11058359

ABSTRACT:
The present invention allows for an increase in programming parallelism in a non-volatile memory system without incurring additional data transfer latency. Data is transferred from a controller to a first memory chip and a programming operation is caused to begin. While that first memory chip is busy performing that program operation, data is transferred from the controller to a second memory chip and a programming operation is caused to begin in that chip. Data transfer can begin to the first memory chip again once it has completed its programming operation even though the second chip is still busy performing its program operation. In this manner high parallelism of programming operation is achieved without incurring the latency cost of performing the additional data transfers. Two sets of embodiments are presented, one that preserves the host data in a buffer until successful programming of that data is confirmed and one that does not require that success be achieved and that does not preserve the data thus achieving a higher rate of data programming throughput.

REFERENCES:
patent: 5513138 (1996-04-01), Manabe et al.
patent: 5523980 (1996-06-01), Sakui et al.
patent: 6172906 (2001-01-01), Estakhri et al.
patent: 6317371 (2001-11-01), Katayama et al.
patent: 6330185 (2001-12-01), Wong et al.
patent: 6525952 (2003-02-01), Araki et al.
patent: 2002/0163837 (2002-11-01), Wong
First Office Action for Chinese Application No. 03808287.X for San Disk Corporation, Mailed Jul. 6, 2006, 2 pages.
International Search Report mailed Jun. 2, 2003.

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