Pipelined low-voltage current-mode logic with a switching...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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C326S127000, C327S408000

Reexamination Certificate

active

06903579

ABSTRACT:
Multiple-input CML gates with a stack height of one are provided by using a composite device wherein input signals are propagated to the output through two or more stages of CML-like primitives connected in succession. A universal three-input CML gate (a 2:1 multiplexor) is provided by using a two-stage pipeline, and can be used to build other logic devices, such as AND, OR, and XOR functions, or a latch. The pipelined CML gates with a stack height of one provide a substantially improved voltage-speed trade-off under low-voltage conditions.

REFERENCES:
patent: 6680625 (2004-01-01), Lee et al.
patent: 6781420 (2004-08-01), Zhang
B. Razavi, Y. OTa, and R. G. G. Swart, Design Techniques for low-voltage high-speed digital bipolar circuits, IEEE J. Solid-State circuits, IEEE J. Solid-State Circuits, vol. 29, No. 3, Mar. 1994, pp. 332-339.
Campbell, Peter M. et al., “A Very-Wide Bandwidth Digital VCO Implemented, in GaAs HBTs Using Frequency Multiplication and Division,” 17thAnnual GaAs IC Symposium Technical Digest, pp. 311-314, Oct. 1995.

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