Pipeline processing communicating adjacent stages and...

Details Pipeline processing communicating adjacent stages and... Pipeline processing communicating adjacent stages and...

2006-09-08

2010-10-19

Lee, Chun-Kuan (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

C710S110000

Reexamination Certificate

active

07818546

ABSTRACT:
A bus apparatus for transferring information between a bus master and a bus slave includes a plurality of pipeline registers capable of transmitting information from the bus master to the bus slave by a pipeline processing; and a plurality of management devices that manage each pipeline register. Also, the management device includes: a holding state keeping unit that keeps a holding state as information indicating whether a current stage's pipeline register corresponding to the management device holds information; an adjacent stage's holding state specifying unit that specifies the holding state of a previous stage's pipeline register that transmits information to the current stage's pipeline register and the holding state of a subsequent stage's pipeline register to which information from the current stage's pipeline register is transmitted; and a transfer control unit that determines whether information held by the corresponding pipeline register is transferred.

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Notice of Rejection issued by the Japanese Patent Office on May 11, 2010, for Japanese Patent Application No. 2006-043182, and English-language translation thereof.

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