Pipeline bit handling circuit and method for a bus bridge

Details Pipeline bit handling circuit and method for a bus bridge Pipeline bit handling circuit and method for a bus bridge

2007-09-25

2007-09-25

Rinehart, Mark H. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S306000, C710S314000, C708S233000, C711S146000

Reexamination Certificate

active

11064744

ABSTRACT:
A circuit and method to provide pipeline bit handling across a bus bridge between two different buses. In a preferred embodiment, the pipeline bit handling circuit provides rule enforcement for a P-bit address modifier across a bus bridge between two different buses with different rules for the P-bit address modifier. In a bus domain where pipeline transactions are allowed if the P-Bit is asserted and are not allowed if the P-Bit is not asserted, embodiments herein allow a master bus device to ensure that all bus devices will see a P=0 command with a defined minimum spacing to any other P=0 command. The required separation for P=0 commands is maintained within the bus bridge. In the preferred embodiments, the separation between P=0 commands is maintained by immediately retrying P=0 commands rather than spacing snoop requests.

REFERENCES:
patent: 4281381 (1981-07-01), Ahuja et al.
patent: 5038346 (1991-08-01), Courtois
patent: 5546546 (1996-08-01), Bell et al.
patent: 5581705 (1996-12-01), Passint et al.
patent: 5740409 (1998-04-01), Deering
patent: 5778096 (1998-07-01), Stearns
patent: 5835739 (1998-11-01), Bell et al.
patent: 5835741 (1998-11-01), Elkhoury et al.
patent: 5841973 (1998-11-01), Kessler et al.
patent: 5893151 (1999-04-01), Merchant
patent: 6021451 (2000-02-01), Bell et al.
patent: 6055608 (2000-04-01), Arimilli et al.
patent: 6065087 (2000-05-01), Keaveny et al.
patent: 6124868 (2000-09-01), Asaro et al.
patent: 6138218 (2000-10-01), Arimilli et al.
patent: 6247086 (2001-06-01), Allingham
patent: 6252849 (2001-06-01), Rom et al.
patent: 6363438 (2002-03-01), Williams et al.
patent: 6405276 (2002-06-01), Chen et al.
patent: 6449699 (2002-09-01), Franke et al.
patent: 6477610 (2002-11-01), Willenborg
patent: 6502154 (2002-12-01), Meredith et al.
patent: 6502157 (2002-12-01), Batchelor et al.
patent: 6556952 (2003-04-01), Magro
patent: 6571308 (2003-05-01), Reiss et al.
patent: 6581116 (2003-06-01), Arimilli et al.
patent: 6668309 (2003-12-01), Bachand et al.
patent: 6694383 (2004-02-01), Nguyen et al.
patent: 6725296 (2004-04-01), Craddock et al.
patent: 6751695 (2004-06-01), Jirgal
patent: 6799317 (2004-09-01), Heywood et al.
patent: 6801207 (2004-10-01), Tischler et al.
patent: 6801208 (2004-10-01), Keshava et al.
patent: 6816161 (2004-11-01), Lavelle et al.
patent: 6820143 (2004-11-01), Day et al.
patent: 6820174 (2004-11-01), Vanderwiel
patent: 6848032 (2005-01-01), Benkual et al.
patent: 6886048 (2005-04-01), Richard et al.
patent: 6889284 (2005-05-01), Nizar et al.
patent: 6978319 (2005-12-01), Rostoker et al.
patent: 6985988 (2006-01-01), Nsame
patent: 6993632 (2006-01-01), Kruckemyer et al.
patent: 7054987 (2006-05-01), Reed et al.
patent: 7124232 (2006-10-01), Takeda et al.
patent: 7143246 (2006-11-01), Johns
patent: 2004/0117592 (2004-06-01), Day et al.
patent: 2004/0156199 (2004-08-01), Rivas et al.
patent: 2004/0162946 (2004-08-01), Day et al.
patent: 2004/0168011 (2004-08-01), Hemming
patent: 2004/0263519 (2004-12-01), Andrews et al.
patent: 2006/0069788 (2006-03-01), Blackmore et al.
John L. Hennessy et al.,Computer Architecture: A Quantitative Approach, Second Edition, Chapter 8: Multiprocessors, Morgan Kaufmann Publishing, pp. 638-639 and 680 (1996).

Affiliated with

Also associated with

Rating

Pipeline bit handling circuit and method for a bus bridge does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pipeline bit handling circuit and method for a bus bridge, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pipeline bit handling circuit and method for a bus bridge will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3768082