Pipeline accessing method to a large block memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C365S185330

Reexamination Certificate

active

07076598

ABSTRACT:
A pipeline accessing method to a large block memory is described. The large block flash memory has a plurality of pages and each page has a plurality of sectors. The memory device has a controller to control an access operation between a host and a cell array of the large block flash memory with a page buffer. The controller includes at least two buffers, when the host intends to program the memory device. In the method, data sectors are transferred between the host and the large block flash memory by alternatively using the buffers. After transferring N data sectors with respect to one page, a start program command is issued by the controller for programming the data.

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patent: 6907497 (2005-06-01), Hosono et al.

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