Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-10-22
2004-01-13
Eckert, George (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S290000, C257S291000, C257S432000
Reexamination Certificate
active
06677628
ABSTRACT:
The present disclosure describes a specific way of using a pinned photodiode in an active pixel sensor array.
BACKGROUND
U.S. Pat. No. 5,625,210 describes using a pinned photodiode in an active pixel sensor array. This patent describes certain advantages which are obtained from using a pinned photodiode in such a sensor. These advantages are well known in the field of pinned photodiodes. One advantage is better photogenerated carrier collection, which leads to improved blue response, less dark current generation, and improved charge transfer from the photosensitive element to its receptor.
A conventional diode has n doped region formed at the surface of the device. The p-doped area surrounds the n-doped area.
A pinned photodiode has n type material and a p-n junction that is buried below the surface. This has certain advantages. Since the potential on the n-junction is below the surface, it avoids current on the surface. The dark current is reduced. Moreover, since the pn junction is buried, there is less photocombination or photorecombination, thereby improving the blue response.
Moreover, since the active area is buried in the dark current generator, it becomes easier to transfer the charge. The charge can be transferred using CCD techniques. This can result in 99.99% charge transfer efficiency.
This buried surface above the photodetector forms a virtual gate which is pinned to substrate potential, usually ground potential. Pinning this surface to V=0 reduces noise. However, it becomes more difficult to transfer the charge that is stored in the photoreceptor into the desired area for charge reconstruction.
U.S. Pat. No. 5,625,210 teaches using a pinned photodiode in an active pixel sensor. This uses a separate transfer gate to transfer the charge as shown in FIG.
1
. The photodiode
100
has a virtual gate
102
. Transfer gate
104
transfers the charge from the photodiode
100
into a floating diffusion
106
. A second transfer gate
108
is connected to a reset line
110
.
SUMMARY
The present system defines a different way of making and operating a variation on a pinned photodiode. This is done without a transfer gate. A floating gate is used to transfer the charge from the photodiode to a receptor area.
The surface “pinned” region above the charge integration well is floating during readout, but is pinned to the substrate during the integration time. Hence, this system is only partially pinned. During integration time, the device operates as a pinned photodiode with many of the advantages of a pinned photodiode. During the charge integration time, the surface floats.
This operation allows certain advantages. The prior art pinned photodiodes, as described above, require separate integration and readout regions. Both of these regions need to be substantially the same size. The charge is integrated in the integration region, and then transferred by the transfer gate to the readout region.
In contrast, the system described according to the present embodiment uses the same region both for the readout region and for the photosensitive region.
In addition, the system defined according to the present specification does not require a transfer gate. This can further reduce the size of the device. The system also does not require a special contact between the floating node and the gate of the output transistor.
Finally, while the system described in the prior art reads out a negative voltage, the system according to the present invention reads out a positive voltage. This may be more convenient for certain operations.
REFERENCES:
patent: 4450466 (1984-05-01), Nishizawa et al.
patent: 4912537 (1990-03-01), Boyd
patent: 5563429 (1996-10-01), Isogai
patent: 5625210 (1997-04-01), Lee et al.
patent: 5942774 (1999-08-01), Isogai et al.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Eckert George
Micro)n Technology, Inc.
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