Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-11-30
2002-09-10
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06449760
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to design tools for integrated circuits. More specifically, but without limitation thereto, the present invention relates to a method of pin placement for hard macros.
Integrated circuits typically include building block circuits called hard macros or “hardmacs”. Previous methods of defining pin placement for hard macros in the design of an integrated circuit do not consider all possible constraints on pin placement, disadvantageously resulting in a less than optimum pin placement. Pin constraints are created by a floorplanning tool or a circuit designer to ensure timing closure and efficient interface to the top-level block where the hard macro is instantiated. Also, the pin constraints impact the placement of cells inside the hard macro. For example, a pin constraint may place a pin on a certain side of the hard macro (side constraint), on a selected layer (layer constraint), in a given row (row constraint) or column (column constraint) defining the hard macro area, in a given position, or in a specific sequence.
SUMMARY OF THE INVENTION
The present invention advantageously addresses the problems above as well as other problems by providing a method of pin placement for hard macros that recognizes all pin constraints and satisfies a maximum number thereof.
In one embodiment, the present invention may be characterized as a method of pin placement for an integrated circuit that includes the steps of (a) receiving as input a corresponding set of pin constraints for each pin of a hard macro, (b) receiving as input a specification for the hard macro, (c) creating pin slots on each side of the hard macro, (d) finding at least one of a horizontal interval and a vertical interval on a side of the hard macro for each pin of the hard macro, and (e) assigning each pin of the hard macro to a pin slot within the at least one of a horizontal interval and a vertical interval that satisfies the corresponding set of pin constraints.
In another embodiment, the present invention may be characterized as a computer program product that includes a medium for embodying a computer program for input to a computer and a computer program embodied in the medium for causing the computer to perform the following functions: (a) receiving as input a corresponding set of pin constraints for each pin of a hard macro, (b) receiving as input a specification for the hard macro, (c) creating pin slots on each side of the hard macro, (d) finding at least one of a horizontal interval and a vertical interval on a side of the hard macro for each pin of the hard macro, and (e) assigning each pin of the hard macro to a pin slot within the horizontal interval or the vertical interval that satisfies the corresponding set of pin constraints.
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Dixit Charutosh
Tetelbaum Alexander
Yeap Soon-lin
Fitch Even Tabin & Flannery
Lin Sun James
LSI Logic Corporation
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