Pin grid array package

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

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Details

174 522, H01L 2328

Patent

active

049355813

ABSTRACT:
In a method of forming a protective cover of a pin grid array in which a semiconductor chip is mounted on an upper surface of a resin board having a plurality of contact pins on a lower surface thereof, the pin grid array is inserted in a recess of a lower mold so as to be at a level lower than an upper surface of the lower mold and to leave a space therearound, the lower mold having the recess for receiving the resin board, grooves, formed on a bottom of the recess, for receiving the contact pins, and projections, formed on a peripheral portion of the recess, for abutting against part of side surfaces of the resin board. An upper mold is then placed above the upper surface of the lower mold. Finally, a thermosetting resin is injected in a gap defined between the upper and lower molds, thereby performing transfer molding. A pin grid array manufactured by the above method is also disclosed.

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