Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1998-09-17
2001-11-27
Sheikh, Ayaz R. (Department: 2781)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S068000, C710S070000, C710S071000, C709S236000, C709S250000, C712S001000, C712S006000, C712S300000
Reexamination Certificate
active
06324611
ABSTRACT:
BACKGRQUND OF THE INVENTION
1. Field of the Invention
The present invention relates to generally to high speed data transmission on serial buses, and more specifically to a physical layer interface than can extend the maximum length of IEEE 1394 serial bus between adjacent nodes.
2. Description of the Related Art
A high speed serial bus for transfer of both asynchronous and isochronous data berween a computer and peripheral devices (or nodes) is stadardized by the IEEE in 1995 as “IEEE Standard for a High Performance Serial Bus”. Differential signaling is used to detect line state of the serial bus by driving steady state line voltage from the opposite ends of two pairs of twisted wire. At each end of the serial bus, data/strobe signaling is used to drive a firsc line scate voltage on one pair of twisted wire and a second line state voltage on the other pair. The combinacion of the first and second line state voltages represent a particular line state at each end of the serial bus. Using a set of such steady state combinations, arbitration signaling determines which node will gain ownership of the serial bus. However, since the steady state differential signaling is sensitive to cable transmission loss, the maximum length of the inter-nodal cable is currendy limited to 4.5 meters.
Therefore, a need arises to extend the maximum length of the inter-nodal cable. One solution is to convert the digital arbitration signals generated within the arbitration logic circuitry into a codeword and transmit it in serial form, instead of the steady state arbitration signals. However, it is impossible to create a recognizable digital differential line state similar to the steady state differential line state as specified by the IEEE 1394 standard.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a physical layer interface which uses serial digital signals for two-way transmission over a serial bus and line state detection circuitry for synthesizing a steady state differential line state.
According to one aspect of the present invention, there is provided a physical layer interface for a serial bus comprising a controller for producing parallel data representing a near-end line stare of the serial bus, a line transmitter connected to the controller for converting the parallel data therefrom into serial data and transmitting it to the serial bus, and a line receiver connected to the serial bus for receiving therefrom serial data and converting it into parallel data representing a far-end line state of the serial bus. Differential line state detection circuitry is provided for detecting a differential line state of the serial bus from the parallel data of the controller and the parallel data of the line receiver and applying the detected differential line state to the controller.
According to a second aspect, the present invention provides a physical layer interface for a serial bus which comprises a controller for producing parallel data representing a near-end line state of the serial bus and receiving parallel data representing a differential far-end line state of the serial bus, a line receiver connected to the serial bus for receiving therefrom serial data and producing therefrom parallel data representing the differential far-end line state of the serial bus. Far-end line state detection circuitry is provided for detecting a far-end line state of the serial bus from the parallel data of the controller and the parallel data of the line receiver and producing parallel data representing the detected far-end line state of the serial bus. Differential line state detection circuitry detects a differential line state of the serial bus from the parallel data of the controller and the parallel data of the far-end line state detection circuitry and produces parallel data representing the detected differential line state of the serial bus. A line transmitter converts the parallel data of the differential line state detection circuitry into serial data and transmits the serial data to the serial bus.
Preferably, the line transmitter comprises an encoder for converting the parallel data into a parallel line code, and a parallel-to-serial converter for converting the parallel line code into serial form for transmission, and a the line receiver comprises a serial-to-paralel converter for receiving a serial line code from the serial bus and converting the received line code into a parallel line code, and a decoder for decoding the parallel line code into parallel data for application to the differential line state detection circuitry.
According to a third aspect, the present invention provides a method of arbitration between nodes over a serial bus, comprising the steps of producing parallel data representing a near-end line state of the serial bus, converting the parallel data into serial data and transmitting the serial data to the serial bus, receiving serial data from the serial bus and converting the received serial data to parallel data representing a far-end line state of the serial bus, converting the parallel data representing the near-end line state and the parallel data representing the far-end line state to parallel data representing a differental line state of the serial bus, and making a decision on the parallel data representing the differential line state.
According to a fourth aspect, the present invention provides a method of arbitration between nodes over a serial bus, comprising the steps of producing parallel data representing a near-end line state of the serial bus, receiving serial data from the serial bus and converting the received serial data to parallel data representing a far-end differential line state of the serial bus, making a decision on the parallel data representing the far-end differential line state, converting the parallel data representing the near-end line state and the parallel data representing the far-end differential line state to parallel data representing a far-end line state of the serial bus, converting the parallel data representing the near-end line state and the parallel data representing the fari-end line state to parallel data representing a near-end differential line state of the serial bus, and converting the parallel data representing the near-end differential line state into serial data and transmitting the serial data to the serial bus.
REFERENCES:
patent: 4651316 (1987-03-01), Kocan et al.
patent: 4825402 (1989-04-01), Jalali
patent: 5587709 (1996-12-01), Jeong
patent: 5684832 (1997-11-01), Adachi et al.
patent: 5717725 (1998-02-01), Campana, Jr.
patent: 5742644 (1998-04-01), Campana, Jr.
M. Teener, “A Bus On A Diet—The Serial Bus Alternative, An Introduction to the P1394 High Performance Serial Bus,” 1992 IEEE, Feb. 24, 1992, pp. 316-321.
Jean Frantz B.
NEC Corporation
Sheikh Ayaz R.
Sughrue Mion Zinn Macpeak & Seas, PLLC
LandOfFree
Physical layer interface and method for arbitration over... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Physical layer interface and method for arbitration over..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Physical layer interface and method for arbitration over... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2613841