Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2005-03-01
2005-03-01
Nguyen, Ha Tran (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S638000, C438S687000, C438S725000
Reexamination Certificate
active
06861376
ABSTRACT:
An improved method of forming a dual damascene structure by a via first process is described. Via holes are formed in a damascene stack consisting of an etch stop layer, a dielectric layer, and a barrier layer. An i-line photoresist is coated on the substrate and fills the vias. An e-beam curing step is performed to render the photoresist components inactive towards adjacent layers. The photoresist is etched back to a level about 1600 Angstroms above the via bottom to form a plug. A second curing step may be performed and then a Deep UV resist is preferably coated and patterned to form a trench opening above the vias. There is no interaction between the Deep UV photoresist and the cured plug which thereby prevents scum or bridging defects from occurring. Fences during trench etch are avoided. Plug stabilization also prevents voids from forming during trench patterning.
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Chen Dian-Hau
Shiu Ruei-Je
Wu Juei-Kuo
Duane Morris LLP
Nguyen Ha Tran
Taiwan Semiconductor Manufacturing Co.
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