Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-06-28
2002-12-03
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S233000
Reexamination Certificate
active
06489643
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a pinned photodiode of an image sensor and a method for manufacturing the same , and, more particularly, to a pinned photodiode of an image sensor fabricated by CMOS processes (hereinafter, referred to as a “CMOS image sensor”) and the manufacturing method thereof.
As is well-known to those skilled in the art, the pinned photodiode (PPD) has been widely used as an element to produce and integrate photoelectric charges generated in CCD or CMOS image sensors sensing light from an object. It could also be called a “buried photodiode” since it has a PNP (or NPN) junction structure which is buried in a substrate. Compared to photodiodes having other structures, such as a source/drain PN junction structure an MOS capacitor structure, etc., the PPD has various benefits. One advantage is the ability to increase depletion depth to bring about high quantum efficiency in converting incident photons into electric charges. That is, in a PPD having a PNP junction structure, the N-type region is fully depleted and the depletion region extendeds into both P-type regions, resulting in an increase in depletion depth. Accordingly, this vertical extension of the depletion depth increases the quantum efficiency, thereby producing excellent light sensitivity.
When a PNP junction PPD is employed in CMOS image sensors using a power supply voltage of less than 5V or 3.3V, both P regions must be held at the same potential, which must be less than the power supply voltage (e.g., 1.2V to 2.8V) in order for the N region to fully deplete. This technology is disclosed in U.S. Pat. No. 6,180,969, entitled “CMOS Image Sensor with Equivalent Potential Diode” filed on Feb. 26, 1999, which is assigned to “Hyundai Electronics Industries Co. Ltd.
FIG.
1
. shows the low-power PPD disclosed in U.S. Pat. No. 6,180,969. The PPD has a PNP structure where an N
−
doping region
102
and a P
0
doping region
101
are formed in a P-epi (epitaxial) layer. At this time, an N
−
ion implantation mask for forming a deep N
−
and a P
0
ion implantation mask for P
0
is used. The newly formed masks differ from each other in their pattern width. That is, the open area for the P
0
doping region
101
is larger than that of the N
−
doping region
102
. By bringing the P-epi layer into contact with P
0
doping region
101
so that the P-epi layer and P
0
doping region
101
have the same low voltage, this PPD can safely produce a full depletion layer in the N
−
doping region even at a voltage of less than 3.3V.
The PPD shown in
FIG. 1
makes full depletion at a low voltage possible and, to some extent, improves the quantum efficiency. Further, it is possible to increase the depletion depth by using the P-epi layer. However, with this method it is not possible to obtain a depletion depth of the N
−
doping region sufficient to create high light sensitivity, even if the desired quantum efficiency is obtained.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a pinned photodiode having an increased depletion depth in comparison with the prior art, and a manufacturing method thereof.
It is, therefore, another object of the present invention to provide a pinned photodiode to increase the constant charge capacity and a manufacturing method thereof.
In accordance with an aspect of the present invention, there is provided a pinned photodiode in an image sensor comprising: a semiconductor layer of a first conductivity type; a first doping region of a second conductivity type formed in the semiconductor layer, wherein the first doping region includes at least two multi-implantation layers which are formed by different ion acceleration energy and wherein the first doping region is set apart from a field oxide layer to isolate other adjacent photodiodes; and a second doping region of the first conductivity type formed between the first doping region and a surface of the semiconductor layer, wherein the area of the second doping region is larger than that of the first doping region, and wherein a thickness between the first doping region and the surface of the semiconductor layer is made thin by the multi-implantation layers.
In accordance with another aspect of the present invention, there is provided a pinned photodiode in an image sensor comprising: a semiconductor layer of a first conductivity type; and at least two first doping regions of a second conductivity type alternately formed in the semiconductor layer and connected to each other at edges thereof so that the first doping regions have the same potential, whereby a plurality of PN junctions are formed in the semiconductor layer and the PN junctions improve the capturing capacity of photoelectric charges generated in the photodiode.
In accordance with a further aspect of the present invention, there is provided a method for forming a pinned photodiode in an image sensor, the method comprising the steps of: providing a semiconductor layer of a first conductivity type; forming a field oxide layer to isolate an active region from a field region; forming a first ion implantation mask of which an edge covers a portion of the active region adjacent to the field region, opening the active region; forming a first doping region through two ion implantation processes with different ion implantation energy; removing the first ion implantation mask; forming a second ion implantation mask of which an edge is arranged at a boundary between the field and active regions, opening the active region; and forming a second doping region between a surface of the semiconductor layer and the first doping region, whereby a thickness between the first doping region and the surface of the semiconductor layer is made thin by the two ion implantation processes.
In accordance with still another aspect of the present invention, there is provided a method for forming a pinned photodiode in an image sensor, the method comprising the steps of: providing a semiconductor layer of a first conductivity type; forming a field oxide layer to isolate an active region from a field region; patterning a gate of a transfer transistor to transfer photoelectric charges generated in the photodiode; forming a first doping region of a second conductivity type in the active region using a first ion implantation mask, which covers a portion of the active region adjacent to the field region and opens an edge of the transfer transistor; forming a second doping region of the first conductivity type on the first doping region using a second ion implantation mask which covers the transfer transistor; forming a third doping region of the second conductivity type on the second doping region using a third ion implantation mask, which covers the portion of the active region adjacent to the field region and opens an edge of the transfer transistor, wherein the first and third doping regions are connected to each other at edges thereof so that the first and third doping regions have the same potential; and forming a fourth doping region of the first conductivity type on the third doping region using a fourth ion implantation mask that opens the active region.
In accordance with still another aspect of the present invention, there is provided a method of forming a pinned photodiode in an image sensor, the method comprising the steps of: providing a semiconductor layer of a first conductivity type; and alternatively forming N-type impurity regions and a P-type impurity region using first and second ion implantation masks, wherein the first ion implantation mask covers a portion of the active region adjacent to the field region and opens an edge of the transfer transistor and wherein the second ion implantation mask covers the transfer transistor.
REFERENCES:
patent: 4984047 (1991-01-01), Stevens
patent: 5051797 (1991-09-01), Erhardt
patent: 5841159 (1998-11-01), Lee et al.
patent: 5977576 (1999-11-01), Hamasaki
patent: 6100556 (2000-08-01), Drowley et al.
patent: 6127697 (2000-10-01), Guidash
Cha Myung Hwan
Lee Ju Il
Lee Nan Yi
Hynix / Semiconductor Inc.
Munson Gene M.
Townsend and Townsend / and Crew LLP
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