Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-11-29
2001-08-07
Mintel, William (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S292000, C257S461000, C257S463000, C257S465000, C438S059000
Reexamination Certificate
active
06271553
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a photo sensor in a photo diode on a semiconductor wafer and a method of forming the photo sensor.
2. Description of the Prior Art
The photo diode is a semiconductor device comprising a photo-conductivity cell and a junction diode, and is commonly used in photoelectric products, such as cameras and the photo sensors of scanners. The light-induced current of the photo diode represents a signal, whereas the current present in the absence of light represents noise. The photo diode processes signal data by using the magnitude of the signal-to-noise ratio. In the semiconductor industry, it is often desired to increase the light-induced current of the photo diode so as to increase the signal-to-noise ratio, and hence to enhance the contrast of the signal. The sensitivity of the photo diode would be enhanced and the quality of the photo diode would be improved.
Please refer to FIG.
1
.
FIG. 1
is a cross-sectional diagram of the structure of a prior art photo diode
10
. A prior art photo sensor
20
in the photo diode
10
is positioned on a semiconductor wafer
11
. The semiconductor wafer
11
comprises a silicon substrate
12
and a p-well
14
positioned on the silicon substrate
12
. The photo diode
10
comprises an n-type metal oxide semiconductor (NMOS) transistor
16
positioned on the surface of the p-well
14
, and a photo sensor
20
formed on the surface of the p-well
14
and electrically connected to the NMOS transistor. The semiconductor wafer
11
also comprises a field oxide layer
18
positioned on the surface of the p-well
14
that surrounds the photo sensor
20
. The field oxide layer
18
acts as a dielectric insulating material to prevent short circuiting between the photo sensor and other units.
In the formation of the prior art photo sensor
20
of the photo diode
10
, a high dosage of arsenic (As) atoms is used as the major dopant in an ion implantation process. This ion implantation process is performed to form an n-type doped region
22
on the surface of the p-well
14
. A depletion region
24
for detecting the leakage current is formed along the PN junction between the doped region
22
and the adjacent p-type well
14
. In
FIG. 1
, the area marked with slanting lines illustrates the depletion region
24
.
The doped region
22
formed by the high dosage ion implantation process, and the p-well
14
that also has a high doping density, will both result in a narrower width of the depletion region
24
, and will also decrease the real active region of the photo sensor
20
. Therefore, the light-induced current sensed by the depletion region
24
is reduced. In addition, the interface of the doped region
22
and the p-well
14
under the field oxide layer
18
induces additional noise. As a result, the signal-to-noise ratio is lowered and the sensitivity of the photo sensor
20
is reduced.
SUMMARY OF THE INVENTION
It is therefore a primary objective of the present invention to provide a photo sensor in a photo diode to solve the above mentioned problems.
In a preferred embodiment, the present invention provides a photo sensor in a photo diode on a semiconductor wafer. The surface of the semiconductor wafer comprises a silicon substrate and a p-well. The photo diode comprises an NMOS transistor positioned on the surface of the p-well serving as a reset MOS transistor of the photo diode, a photo sensor positioned beside the p-well and electrically connected to the NMOS transistor, a field oxide layer surrounding the photo sensor and acting as an insulation layer, and a channel stop positioned under the field oxide layer. The photo sensor comprises a first n-type doped region positioned on the surface of the photo sensor and doped with arsenic (As) atoms, and a second n-type region positioned between the first n-type region and the insulation layer. The second n-type doped region is doped with phosphorus (P) atoms. The doping density of the second n-type doped region is lower than that of the first n-type doped region. The depth of the second n-type doped region is deeper than the bottom of both the field oxide layer and the first n-type doped region, and the second n-type doped region is at least partially under the field oxide layer. The second n-type doped region functions to reduce the electrical field around the first n-type doped region so as to reduce the leakage current. In addition, dopants in the second n-type doped region will interact with the substrate to form a depletion layer so as to enhance the sensitivity of the photo diode.
In the formation of the preferred embodiment, the present invention method is based on the above mentioned semiconductor wafer. A first ion implantation process is performed to form the first n-type doped region on the surface of the photo sensor, using arsenic atoms as dopants. The dosage and the energy for the first ion implantation process are around 10
16
cm
−3
and less than 80 Kev, respectively. Then a second ion implantation process is performed between the first n-type doped region and the insulation layer on the surface of the photo sensor area to form the second n-type doped region, using phosphorus atoms as dopants. The dosage and the energy in the second ion implantation process are less than 10
13
cm
−3
and larger than 200 Kev, respectively.
It is an advantage of the present invention that a lower dosing density second n-type doped region surrounds the photo sensor to reduce the electrical field of the PN junction and thereby reduce the leakage current. In addition, the depletion region is formed at a shallower depth, so the sensitivity of the depletion region to blue light is better.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment which is illustrated in the various figures and drawings.
REFERENCES:
patent: 6040592 (2000-03-01), McDaniel et al.
patent: 6051447 (2000-04-01), Lee et al.
patent: 6084259 (2000-07-01), Kwon et al.
patent: 6090639 (2000-07-01), Pan
patent: 6100551 (2000-08-01), Lee et al.
patent: 6166405 (2000-12-01), Kuriyama et al.
Hsu Winston
Mintel William
United Microelectronics Corp.
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