Photo-lithography process using multiple anti-reflective...

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S311000, C430S317000, C430S320000, C430S324000, C430S950000

Reexamination Certificate

active

06331379

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the field of integrated circuit fabrication, and more specifically to the use of dielectric anti-reflective coatings in integrated circuit fabrication processes.
2. Description of the Related Art
The semiconductor industry's drive toward increasingly smaller integrated circuit geometries has led to the use of photolithography processes that employ radiation with increasingly shorter wavelengths. More specifically, in order to achieve sufficient resolution, deep submicron (less than approximately 0.5 micron) applications require the use of deep ultraviolet (DUV) radiation with wavelengths of, for example, approximately 248 nanometers, as compared to G-line (approximately 436 nanometers) or I-line (approximately 365 nanometers) radiation.
However, the use of DUW radiation has led to problems. In particular, reflections from underlying layers of metals, metal silicides and polysilicon during exposure has led to problems such as higher CD variances from area to area, standing wave effects and the well-documented “footing” problem. The formation of standing waves reduces critical dimension control and causes large linewidtlh variations over device topography. These problems are exacerbated by the increased reflectivity exhibited by many materials in the presence of DUV radiation. These problems are particularly severe in areas where the reflective surface topography is “stepped” (where the reflective surface is rising or falling, such as at the edges of a gate stack).
These problems have led to the use of anti-reflective coatings. Anti-reflective coatings are typically deposited on a substrate below a photoresist layer to control reflection of DUV radiation off of surfaces below the anti-reflective coating and thereby minimize the problems associated therewith. While helpful, known anti-reflective coatings are not completely effective in controlling undesirable reflections.
One problem with the use of anti-reflective coatings is that they are typically opaque and have a high absorption value and index of refraction, while the materials above the anti-reflective coatings are typically transparent and have a lower absorption value and lower index of refraction. For example, a thin film of opaque anti-reflective coating is often used beneath a transparent inter-level dielectric layer. A dielectric anti-reflective coating, or DARC may be used beneath inter-level dielectric layers.
The problem with using an anti-reflective coating in this manner is that the interface between the bottom surface of the dielectric and the top surface of the anti-reflective coating causes a reflection due to the index of refraction mismatch. Thus, although the DARC may be totally effective in preventing any radiation penetrating its upper surface from being reflected off of surfaces below the DARC, some radiation will be reflected off of the DARC/dielectric layer interface. This reflected radiation causes the aforementioned problems.
A second problem associated with anti-reflective coatings is that, for various reasons not of concern here, the integrated circuit fabrication process is such that the thickness of the anti-reflective coating must be thinner than the thickness required to completely prevent radiation from reflecting off surfaces below the anti-reflective coating and back.
What is needed is an anti-reflective coating that reduces reflections from surfaces beneath the anti-reflective coating as well as reflections from the upper surface of the anti-reflective coating itself.
SUMMARY OF THE INVENTION
The present invention overcomes to a great extent the aforementioned problems by providing a multiple layer anti-reflective coating. The upper layer of anti-reflective coating has an absorption and index of refraction that allows at least some radiation to penetrate it, reflect off the interface between the upper anti-reflective coating layer and lower anti-reflective coating layer, and pass back through the upper layer. In this manner, there will be at least two interfaces from which radiation is reflected: 1) the interface between the upper surface of the upper anti-reflective coating layer and whatever material (e.g. dielectric, photoresist) is above it, and 2) the interface between the lower surface of the upper anti-reflective coating layer and the upper surface of the lower anti-reflective coating layer. The thickness, index of refraction and absorption value of the upper layer are chosen such that the amplitudes of the radiation reflected from the two interfaces are approximately equal, but the phase difference between the radiation is approximately 180 degrees so that the reflections cancel each other. There may also be radiation reflected from reflective surfaces which reside below the anti-reflective coating layers, depending upon the thickness and absorption of the layers. In this case, the thicknesses, indices of refraction and absorption values are chosen such that the amplitudes and phase difference from the three sources of reflected radiation mutually cancel when combined. Thus, the total reflected radiation may be greatly reduced. A second benefit that is realized is that variations in reflectivity due to differences in thickness of other layers of materials, such as dielectrics, is greatly reduced. This reduction in sensitivity, or increased process margin, is especially important where the geometry of the substrate is complex.
The anti-reflective coating layers may also be used as an etch stop in the integrated circuit fabrication process. For example, a multiple layer DARC may function as an etch stop when an inter-level dielectric is etched to create a path to the bit line contact in a conventional bit-line over capacitor DRAM cell fabrication process.


REFERENCES:
patent: 5527739 (1996-06-01), Parrillo et al.
patent: 5733712 (1998-03-01), Tanaka
patent: 5741626 (1998-04-01), Jain et al.
patent: 5763327 (1998-06-01), Blasingame et al.
patent: 5821160 (1998-10-01), Rodriguez et al.

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