Phase splitter using digital delay locked loops

Details Phase splitter using digital delay locked loops Phase splitter using digital delay locked loops

2011-01-18

2011-01-18

Odom, Curtis B (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S371000, C327S147000, C327S149000, C327S153000, C327S156000, C327S158000

Reexamination Certificate

active

07873131

ABSTRACT:
A phase splitter using digital delay locked loop (DLL) to receive complementary input clock signals to generate a plurality of output signals having different phase shifts. When the DLL is locked, the delay resolution of the phase splitter is equal to two delay stages of the DLL.

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